Run Time Memory Error Recovery Process in Networking System.

System memory errors have always been problematic; today, they cause more than forty percent of confirmed hardware errors in repair centers for both data centers and telecommunications network nodes. Therefore, it is somewhat expected that, in recent years, device manufacturers improved the hardware features to support hardware-assisted fault management implementation. For example, the new standard, DDR5, includes both data redundancy, the so-called Error Correcting Code (ECC), and physical redundancy, the post-package repair (PPR), as mandatory features. Production and repair centers mainly use physical redundancy to replace faulty memory rows. In contrast, field use still needs to be improved, mainly due to a need for integrated system solutions for network nodes. This paper aims to compensate for this shortcoming and presents a system solution for handling memory errors. It is a multi-technology proposition (mixed use of ECC and PPR) based on multi-layer (hardware, firmware, and software) error information exchange.