Torwards Variability Immune Scalable FeFET-based Macros for IMC DNN Accelerators.

This paper explores the influence of the drain current variation in crossbars of different scaled FeFET devices for IMC macro design. Several methods are proposed to mitigate the increased device variability in highly scaled memory devices by improvements on circuit, architectural, and algorithmic levels to reduce the associated accuracy loss. The efficiency of these new techniques is demonstrated on various relevant image classification benchmarks.