The First Implementation of a Memtranstor Emulator and its Artificial Synaptic Plasticity Analysis

Memtranstor (MT) is proposed as a complement to the concept of memory element, which is conceived based on a direct correlation between magnetic flux φ and charge q. The electrical characteristics of MT is different from other memory elements, which enables MT to have more application scenarios. Thus, we design a floating MT emulator containing a constitutive DC control voltage vs to mimic a hardware MT. In this emulator, the inverse memtranstance (MT-1) can be directly measured and divided into two different states, namely, state 1: MT-1 is always positive or always negative, state 2: MT-1 is either positive or negative. We propose a control method of changing the direction and magnitude of the electric field of vs to achieve these two different states. For the proposed MT emulator, we also analyze typical nonlinear characteristics of pinched hysteresis loops (PHLs) and the variation of MT-1 under different vs and sinusoidal excitation frequencies. The correctness and feasibility of the emulator have been systematically validated through theoretical analysis, PSpice simulation, and hardware experiments. To further demonstrate the potential application of MT, we verify artificial synaptic plasticity of the MT emulator by experiments. The experiments results show that MT emulator can resemble long-term potentiation and long-term depression. The proposed MT emulator has a certain reference value for future research of MT-based nonlinear dynamics and can facilitate MT-based application research.