CCSDS121-based High-Performance Hardware Architecture for Real-Time Data Compression

2023 European Data Handling & Data Processing Conference (EDHPC)(2023)

引用 0|浏览1
暂无评分
摘要
Imaging sensors embarked on Earth Observation satellites are increasing their acquisition capabilities in terms of resolution. The amount of data collected need to be reduced prior to be sent to ground, because of on-board storage limitations and the constrained downlink bandwidth. This results in the need of implementing compression techniques as part of the data handling system. This work presents a high-performance architecture based on the Consultative Committee for Space Data Systems (CCSDS) 121.0-B-3 data compression standard that is able to process collected data in real-time and with an associated low area footprint. Starting from the basis of the Hyperspectral Lossless Compressor for space applications (SHyLoC) 3.0 CCSDS-121 IP, a highly parallelized architecture, in which an operation-based control allows the effective coordination of the independent processing pipelines, has been designed and described in VHDL. Results demonstrate that this architecture is able to process data throughputs of up to 7.776 Gbps, consuming only the 11.68% of LUTs on a Xilinx Kintex UltraScale XCKU040 FPGA and without using internal memory resources.
更多
查看译文
关键词
High-performance on-board processing,real-time data compression,data handling,space data compression
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要