A fully differential analog read-out circuit for differential capacitive sensors

In this work, an analog read-out circuit, based on a fully differential topology, employed for differential capacitive sensors, is presented. The proposed solution is based on differential voltage-controlled capacitors (VCCs), and an auto-balancing bridge topology where the aforementioned VCCs follow the differential sensor capacitors in the steady-state condition; this is achieved through a negative feedback concerning a modulation-demodulation technique and a purely integral control. The circuit interface has been modeled by taking into consideration the main parasitic effects and manufactured through Computer Numerical Control (CNC) milling. Experimental tests have been performed to prove the feasibility of this approach. The latter involve firstly the PCB behavior in static conditions, in particular the input-output model comparison between theoretical and measured values, where a maximum difference of 9.3% for both voltages has been detected; afterwards, the same characteristics have been evaluated changing the sensor baseline capacitance, so observing variations in linearity and output saturation point with respect to the input parameters. The output differential voltage in a common-mode-related condition shows a minimum offset of 0.126 V, which represents the 0.66% of the entire output dynamic. Moreover, the evaluation of the interface fabricated in the PCB in dynamic conditions has been also performed, by extraction of rise and fall time for the differential output voltage variation with respect to two input fixed values, equal to 8.3 ms and 11.3 ms, respectively. A sensitivity of 102 mV/pF and a resolution of 20 fF, as well as a 0.47% linearity error have been obtained.