A Sinusoidal Fitting-based Digital Foreground Calibration Technique for Pipelined ADC.

2023 IEEE 15th International Conference on ASIC (ASICON)(2023)

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摘要
This paper presents a novel foreground digital calibration technique for pipelined ADCs to compensate nonlinearity caused by inter-stage gain error (IGE) and DAC error. The proposed algorithm calibrates the IGE by iterating coefficients multiplied by different stage digital output to reduce the mean-square error (MSE) between the fitted and reintegrated output. DAC error is extracted by averaging the difference between fitted output and IGE calibrated output of the same sub-stage output. Compared to previous works on IGE and DAC error calibration, this work could achieve effective calibration under various static errors and minimize the demand on hardware design. Simulation results show that this technique increases the ENOB and SFDR from 9.24bits and 63.41dB to 11.03bits and 78.68dB, respectively.
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关键词
Pipelined ADC,Inter-stage gain error,DAC error,Iteration,MSE
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