A 1.28mW K-Band Modified Gilbert-Cell Mixer Design in 22nm FDSOI CMOS

Adilet Dossanov,Vadim Issakov

2024 IEEE 24TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, SIRF(2024)

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摘要
This paper presents a low-power, low-voltage downconversion mixer fabricated in a 22nm FDSOI CMOS technology. The proposed mixer design is based on Gilbert-cell architecture and uses a passive transformer instead of an active transconductance stage to overcome voltage headroom limitations in deep-sub-micron CMOS technologies. Measurement results show that the mixer achieves a voltage conversion gain of 7.8 dB, an input-referred 1 dB compression point of -7 dBm, and IIP3 of 4.8dBm under -8dBm local oscillator power. The mixer design consumes a low 1.28mW of power from a single 0.8V supply voltage, which is a significant improvement compared to the state-of-the-art. Furthermore, the mixer's compact size of 0.54x0.45 mm(2), including pads, makes it a highly attractive solution for various applications, as e.g. radar.
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关键词
FDSOI CMOS,down-conversion mixer,low,power,low voltage,transformer,linearity.
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