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An FPGA-Based On-the-Fly Reconfigurable Low-Power SHEPWM Inverter with a Compact SiP Implementation

IEEE transactions on power electronics(2024)

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摘要
This paper presents a selective harmonic elimination pulse-width modulation (SHEPWM) full-bridge inverter featuring real-time on-the-fly reconfigurability of output waveform amplitude and frequency using a field-programmable gate array (FPGA). The inverter is integrated on a compact threedimensional (3D) system-in-package (SiP) using low-temperature co-fired ceramics (LTCC) as a substrate, reducing the printed circuit board (PCB) area. Validated through simulations and measurements at 0.12W and 1.2W peak output power, the inverter cancels harmonics up to the 34 th order at switching nodes. With an LC filter having a 20 kHz cut-off frequency, total harmonic distortion (THD) at the load is below 5.1% for alternating current (AC) output signals, varying in modulation index (MI) from 0.2 to 0.9 and output frequencies from 5 kHz to 10 kHz. The results also showed that for the same inverter conditions and output THD, the SHEPWM inverter with 0.12W output power has an average of 17.3% and 4.2% better efficiency than a natural PWM (NPWM) inverter with an output frequency of 4 kHz and 10 kHz, respectively. For the inverter of 1.2W output power, the SHEPWM inverter maintains better efficiency than the NPWM counterpart, by an average of 2.3% and 6.9%, respectively.
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关键词
Full bridge,gallium nitride (GaN),harmonic cancelation,inverter,low-power inverter,low-temperature cofired ceramics (LTCC),selective harmonic elimination pulsewidth modulation (SHEPWM),system-in-package (SiP)
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