Impact of carbon injection in 4H-SiC on defect formation and minority carrier lifetime

Point defects in silicon carbide (SiC) can act as charge carrier traps and have a pronounced impact on material properties such as the mobility and carrier lifetime. Prominent among these traps is the carbon vacancy (VC) with a demonstrated detrimental effect on the minority carrier lifetime in 4H-SiC epitaxial layers. Hence, a variety of methods for VC removal have been proposed. Common to all is that they involve some sort of C-injection into the epi-layer that leads to annihilation of VC with C interstitials (Ci) via the reaction Ci＋ VC →0̸. However, many studies on injection of Ci for removal of VC do not take into account the potential effect of any additional defects that are formed as a result of excess C in the material, including electrically active defects that introduce energy levels in the SiC band gap. Herein, we study the formation and impact of carbon related defects that are introduced in 4H-SiC epi-layers by injection of excess carbon. C-injection is achieved by annealing 4H-SiC epi-layers covered by a graphitized photoresist known as a C-cap at 1250°C for different durations. The resulting appearance of defects in the samples is monitored using deep level transient spectroscopy (DLTS) and minority carrier transient spectroscopy (MCTS) measurements, which reveal the formation of both minority and majority carrier traps as a result of the C-injection. Intriguingly, the injected carbon is also found to interact with a perennially present impurity in 4H-SiC epi-layers and a potentially lifetime limiting defect, namely boron. Furthermore, we monitor the minority carrier lifetime as a function of C-injection time and depth from the surface using cross-sectional time-resolved photoluminescence (TRPL) measurements. Both the defect distributions and the minority carrier lifetime are found to depend strongly on the duration of the C-cap anneal, with a marked depth dependence being present for all samples studied. The moderate temperature C-cap annealing treatment is proposed as a method for enhancing the carrier lifetime in n-type 4H-SiC epi-layers for power device applications.