2.2 “Zen 4c”: The AMD 5nm Area-Optimized ×86-64 Microprocessor Core

“Zen 4c” is the first area-optimized design in the AMD “Zen” family of microprocessors, targeting energy-efficient and high core-density applications, such as cloud computing. The area of the “Zen 4c” microprocessor core including the private L2 cache is 35% smaller in the same 5nm FinFET process technology [1] as compared to “Zen 4” [2]. With a reduced amount of shared L3 cache per core, from 4MB to 2MB, the core complex die (CCD) of “Zen 4c” has twice the number of cores of the “Zen 4” CCD and the same amount of total L3 cache (32MB), enabling up to 33% more cores per socket. This area optimization enables “Zen 4c” to deliver more than 25% improvement in performance/mm$^{2}$, and 9% improvement in performance/W on SPECrate®2017_int_base [3], as compared to “Zen 4.” “Zen 4c” can operate up to 3.1GHz in frequency in a server configuration, while delivering more power-efficient performance. Fig. 2.2.1 shows the “Zen 4c” based CCD, containing 9.0B transistors in 73mm$^{2}$ and consisting of two core complexes (CCXs), each of which contains eight “Zen 4c” cores and 16MB of L3 cache.