An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and C_OUT-Free Operations

This article presents an efficient buck converter design using the proposed outphase-interleaved hybrid switched-capacitor (OISC) topology. The out phase-interleaved switched-capacitor (SC) cells significantly extend the CF charge-balancing phase without disturbing the inductor volt-second balance (VSB),while doubling the effective inductor switching frequency for reduced current ripple. As a result, it addresses the intrinsic issue of sharply increased flying capacitor (C-F)inrush current in existing SC dual-/multi-path (DP/MP) hybrid buck converters under extreme duty ratios, resolving the tradeoff between SC cell con-duction loss and inductor dc current (I-L,I-dc)reduction capability. The proposed topology attains three key advantages: 1) relived C(F )hard-charging-induced inrush current; 2) reduced I-L,I-dc; and3) power stage normal operation without relying on an output capacitor(COUT), resulting in improved conversion efficiency and power density. To enhance the overall power density and mitigate gate-driving path ringing, we propose an area-efficient fully ON-chip gate-driving scheme with a shared charge pump(CP), ensuring proper operations with all-NMOS power switches. Fabricated in a 180-nm CMOS process with 7.63 mm2chip area, the converter achieves a peak conversion efficiency of 97.3%and an overall peak current density of 585 mA/mm3at 90.1%efficiency. Supporting a load current (I-LOAD)from 0.05 to 3.1 A, it converts 1.8-3.3 V input to 0.8-1.8 V output. Measured output voltage (V-OUT) ripple is similar to 3.3% of V(OUT )dc under 3.1 A I(LOAD )with zero C-OUT.