A 250-MS/s 9.9-ENOB 80.7 dB-SFDR Top-Plate Input SAR ADC With Charge Linearization. Gabriele Zanoletti,Lorenzo Scaletti,Gabriele Bè,Luca Ricci, Michele Rocco,Luca Bertulessi,Carlo Samori,Andrea BonfantiIEEE Trans. Circuits Syst. II Express Briefs(2024)引用 0|浏览2暂无评分AI 理解论文溯源树样例生成溯源树,研究论文发展脉络Chat Paper正在生成论文摘要