Flexible Real-Time Emulation of Fading Channels on SoC-FPGA Devices

Modeling and replicating the channel effects between a transmitter and receiver, is crucial in any telecommunication system, in order to evaluate the impact on the transmitted data. Therefore the necessity of having access to a real time channel emulator is vital. In order to meet these constraints, in this work we present a flexible, high performance and resource efficient FPGA-based channel emulator, focusing on fading models. Additionally, we perform a trade-off analysis between bit accuracy, resources utilization and system’s accuracy in terms of Mean Relative Error and the Probability Density Function. Our study shows that by using a circuit with reduced bit-widths, we can achieve 24%–46% reduction in various resources, while preserving the algorithmic accuracy of the channel emulator and operating at a throughput of 500Msps.