Towards Scalable Multi-Chip Wireless Networks with Near-Field Time Reversal
CoRR(2024)
Abstract
The concept of Wireless Network-on-Chip (WNoC) has emerged as a potential
solution to address the escalating communication demands of modern computing
systems due to their low-latency, versatility, and reconfigurability. However,
for WNoC to fulfill its potential, it is essential to establish multiple
high-speed wireless links across chips. Unfortunately, the compact and enclosed
nature of computing packages introduces significant challenges in the form of
Co-Channel Interference (CCI) and Inter-Symbol Interference (ISI), which not
only hinder the deployment of multiple spatial channels but also severely
restrict the symbol rate of each individual channel. In this paper, we posit
that Time Reversal (TR) could be effective in addressing both impairments in
this static scenario thanks to its spatiotemporal focusing capabilities even in
the near field. Through comprehensive full-wave simulations and bit error rate
analysis in multiple scenarios and at multiple frequency bands, we provide
evidence that TR can increase the symbol rate by an order of magnitude,
enabling the deployment of multiple concurrent links and achieving aggregate
speeds exceeding 100 Gb/s. Finally, we evaluate the impact of reducing the
sampling rate of the TR filter on the achievable speeds, paving the way to
practical TR-based wireless communications at the chip scale.
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