Current integration trends imposed by the market are pushing toward the software radio paradigm. 4G radio receivers, where different wireless standards converge, make RF engineers face harder and harder challenges. Electronic design automation (EDA) tools play an increasing role in the design and verification of wireless system. This article presents a transceiver architecture comparison tool (TACT) which is a hierarchical, user-friendly, Matlab-based tool. It automates the design-space exploration procedure for 4G (fourth generation) wireless receivers. An example that considers a multistandard wideband code division multiple access (WCDMA)/wireless local area network (WLAN) receiver was also presented to illustrate the capabilities of TACT
This article has presented for the first time a scientific and mathematically sound principle that enables both analog and discrete subsystems to be represented uniformly within a single framework, thereby facilitating their simultaneous and uniform simulation within the same simulator. While the combination of the laboratory prototype analog subsystem simulator, DiamSim, and available discrete-event simulators such as VHDL constitute necessary and sufficient proof of the principle, the article outlines how a unified language and execution environment, nVHDL, may be realized for the future. In the coming age of networked computational systems (NCS), future complex systems will include analog hardware, synchronous and asynchronous discrete hardware, software, and inherently asynchronous networks that will interconnect both stationary and mobile entities, all governed by asynchronous control and coordination algorithms (Ghosh,2006). Paul (2006) believes that the current object-oriented programming is being quickly obsoleted by the increasing demands of net-centric warfare and that a dynamic, service-oriented architecture is critically needed to address key future needs of the US DoD. Logic dictates that nVHDL will likely play a key role in the development of a whole new approach, networked computational systems design language and execution environment (NCSDL). that will consist of a language in which complex systems may be described accurately and an execution environment that will permit the realistic execution of the executable description on a testbed to assess the system correctness, reliability, safety, security, and other performance parameters. Furthermore, to obtain results quickly for large systems and use them in iterating system designs, the testbed must consist of a network of workstations configured as a loosely-coupled parallel processor
Each memory device presented has its unique range of advantages and challenges. DRAM and FLASH have radically different characteristics; hence, they are used for different applications. Accordingly, the search for memory devices beyond CMOS comes with an important caveat: different memory for different applications. FENA's research path will continue to focus on improving our presented memory devices, and integrating with logic elements, while exploring other emerging memory devices based on nanomaterials, nanostructures, and the next generation of low-cost assembly techniques
It is widely believed that measurement of molecules in exhaled breath can provide a window into the metabolic state of the human body, detect the presence of cancer, monitor respiratory diseases, assess liver and kidney function, determine exposure to toxins, and possibly, even diagnose schizophrenia. Such conjectures are further supported by recent work performed by researchers at the Pine Street Foundation. Laser spectroscopic techniques, in particular, tunable laser absorption spectroscopy (TLAS), are candidate technologies for breath analysis applications. The paper presents the Breathmeter from Ekips Technologies. The Breathmeter is based on TLAS and consists of four primary components: 1) the laser source module, 2) sample gas cell, 3) optical detector, and 4) associated electronics hardware and software. The optical board layout of the breath meter system was shown. Its applications and future works were also discussed
SECOND EDITION Edited by Jerry C. Whitaker, CRC Press, 2005. This handbook follows the first edition of almost ten years ago, and it includes changes occurring during this period in the area of electronics design. All chapters have been reviewed and updated and several chapters have been added. The handbook is divided into 23 chapters and it has more than 2,500 pages. The 23 chapters encompass the entire electronics fields from classical devices and circuits to emerging technologies and applications. Each chapter opens with a table of contents, and it is composed of subchapters, written by one of the more than 150 international experts involved in this editorial product. In general, at the end of each subchapters, there is a section of defining terms where the key terms are defined, a section of references, and a final section with further information. The broad range of material covered by the handbook is presented with emphasis on practical applications. Thus, each chapter is written to refresh the knowledge of experienced engineers, educate the novice, and enlighten the expert. It is to worth noting that the last chapters report relevant material on the domain of reliability, safety, and engineering management The book is written and structured to be easy to use and can be useful for engineers and technicians involved in the design, production, installation, operation, and maintenance of electronic devices and systems. Giuseppe Di Cataldo
The Internet may be the most complex system ever engineered; from the first host in 1969, it's grown to comprise more than 1 billion routable host addresses (Meng et al., 2005). Its future expansion may be more dramatic still due to the demand to extend the Internet from people to things (Gershenfeld et al., 2004), but the frontiers of high-speed networking have receded further and further from the requirements of small, cheap, slow devices. These things need the Internet's original insights, rather than their current implementation; this is being done in the I0 initiative. The demand for networking embedded devices has led to a proliferation of standards and protocols, including X10, HomePlug, LonWorks, BACnet CEBus, Fieldbus, ModBus, CAN, Lin, I2C, SPI, SSI, ASI, USB, EPC, IrDA, Bluetooth, 802.15.4, and ZigBee. While each of these has been optimized for a particular domain, all are encountering many of the same issues that the Internet faced as it grew, including inadequate address space, the need for naming and routing across networks, and mutual incompatibility. This situation is in fact analogous to the early days of the Internet itself
Peak detectors (or envelope detectors) are commonly found in modern communication receivers mainly as a building block of automatic gain control (AGC) loops. The main function of the peak detectors is to detect the peak value of an input signal and track the peak over time. In this paper, some of peak detector topologies and their applications in multistandard wireless receivers was presented
This article explores the generation of intense soft X-ray pulses and its application to nonlinear multiphoton processes. Using such nonlinear processes, the temporal width of the 42 eV soft X-ray pulse was measured directly by an autocorrelation technique. A train of attosecond frequency-pulses was also characterized by frequency-resolved autocorrelation. Intense high harmonics produced by the phase-matching technique enable the observation of these nonlinear optical processes
The development trend in compact modeling goes toward surface-potential-based approaches and leads to models like HiSIM2, with higher accuracy, fewer model parameters, and shorter computer runtime than achievable with the conventional threshold-voltage-based approaches. The main motivation for continuing this development effort is to realize a sufficient design capability of RF circuits with advanced MOSFETs, where many higher-order phenomena affect the circuit performance, as well as of large mixed-signal circuits, where both accuracy and short simulation time are a must. The trend toward the surface potential brings compact modeling for circuit simulation also much closer to 2D and three-dimensional numerical device simulation. Therefore, both approaches can now come together and work united to achieve the common goal of realizing rapid technology progress for the benefit of the society
In this article, we describe how such an integrated approach has indeed made it possible to produce a PicoNode that meets the original goals. The resulting node combines innovative technologies, such as radio-frequency microelectromechanical systems (RF-MEMS) with ultra-low-power RF and digital integrated circuit (IC) design, and employs aggressive energy-scavenging and packaging techniques. For these technological advances to come to their full fruition, they must be complemented by novel opportunistic networking and wireless protocol schemes that virtually eliminate standby power while still providing robustness
The super junction (SJ) concept (Coe et al.) applied to power semiconductor devices is attractive due to its potential for reducing on-resistance at a given breakdown voltage. Discrete SJ vertical power devices have recently become available commercially. However, lateral SJ devices have not materialized for several years partly due to the fact that the lateral SJ structure, implemented on silicon substrates, suffers from substrate-assisted depletion effects which reduce the breakdown voltage. This article discusses the various device structures that have been proposed to eliminate the substrate-assisted depletion effects in SJ-lateral double diffused MOS LDMOS transistors (SJ-LDMOSTs). The concept of the SJ device and vertical and lateral SJ structure was summarized. The substrate-assisted depletion effects are described in detail. The alternative implementations proposed to suppress the substrate effects were then discussed. And the experimental implementation results are summarized and discussed to identify the most likely option for the implementation of lateral SJ-LDMOSTs
This article presents an overview of the most important effects that handover considerations have on the design of multi-standard mobile radio transceivers. It specifically points out the multitude of design issues and challenges that should be taken into account in the RF/analog front-end part. Many of these issues have not been widely considered yet by the relevant communities though they are instrumental in achieving an always-best-connected mobile terminal.
IEEE CIRCUITS & DEVICES MAGAZINE ■ JULY/AUGUST 2006 8755-3996/06/$20.00 ©2006 IEEE book starts with an introduction to the many circuit applications of inductance and the integrated circuit (IC) fabrication process. Inductor performance is described in terms of the IC technology such as CMOS, SiGe, BiCMOS, and GaAs. Some discussion is given on the various loss mechanisms and the challenge of integrating high-quality inductors on chip. The circuit applications start with a brief description of an LC tank network and extend into the world of LNAs, VCOs, and RF filters. The physics of the inductors are covered in some detail with a discussion of the difficulty of integrating an inductor on chip, followed by a graphical description of the magnetic and electric field generated by the timevarying signal applied to the two ends of the inductor. The authors describe both the selfand mutual inductance and provide a physical basis for both. Much of the discussion is very general and cursory; however, ample references are provided. Resistance effects due to the finite resistance of the inductor metal, as well as skin effect due to high-frequency operation, are also described. Other parasitic effects that contribute to inductor loss are mentioned, including proximity effects and substrate lose mechanisms such as electrically and magnetically induced loses. Inductor models are briefly mentioned, including the standard model and variations of the model. Some discussion is also provided on the various electromagnetic field solvers that can be used to simulate inductors. Quality factor (Q) is defined in the standard way as the ratio of the maximum energy stored in the inductor to its average power dissipation of a duty cycle. Design techniques for improving inductor Q are reviewed, including broken guard rings, biased N-well beneath the inductor, and substrate shielding with broken polysilicon patterned ground shields that are tied to ground. References are provided for each improvement technique. A chapter is included on test and characterization techniques, describing the test equipment necessary to make accurate inductor measurements. It also illustrates the design of the highfrequency ground-signal-ground probes and the various probing techniques that are required to provide good planarization and pad contact. The authors provide a discussion of the various error terms that arise when measuring inductors and spend some time discussing the merits and types of calibration. The book concludes with an in-depth discussion of the geometrical influence on inductor performance. This book serves as an excellent introduction to the design and characterization of integrated on-chip inductors. It is a reasonably well written and understandable text that provides insight into the issues surrounding the integrated inductor as a necessary circuit element. Michael Hargrove Epson Research and Development
Answer to September/October 2006 brain teaser challenge and final farewell and thank you for reading these special editions of the Brain Teaser Challenge in IEEE Circuits and Devices Magazine.
