
Variational Quantum Algorithms (VQAs) are a central class of hybrid quantum–classical methods for optimization on noisy intermediate-scale quantum (NISQ) hardware. Their scalability is constrained by the cost of gradient evaluation via the parameter-shift rule, whose complexity grows with both the number of circuit parameters and Pauli terms in the Hamiltonian, quickly dominating runtime for deep circuits or large qubit counts. We present TREV (Tensor-Ring Evaluated Variational algorithms), a Python library that accelerates VQA simulation through batched parameter evaluation within tensor-ring state representations . By amortizing contraction and sampling costs across multiple parameter shifts, TREV exploits GPU-parallel tensor contractions to achieve substantial runtime reduction with tunable memory–throughput trade-offs. Implemented in PyTorch, the framework supports both deterministic contraction-based and stochastic sampling-based evaluations. Benchmarks on Max-Cut, Traveling Salesperson Problem (TSP), and molecular ground-state energy estimation (H 2 , H 4 , LiH, BeH 2 ) show comparable accuracy and up to 97% runtime reduction over sequential evaluation, while outperforming PennyLane, TensorCircuit, and Qiskit in runtime scalability. The chemistry benchmarks further demonstrate that TREV handles arbitrary Pauli Hamiltonians beyond QUBO formulations, broadening its applicability to quantum chemistry.
Variational quantum algorithms often adapt the ansätze (ansatz) to the target Hamiltonian, leading to deep or hardware-incompatible circuits. In this work we demonstrate an opposite approach: choosing a hardware-efficient CNOT-ladder ansatz and calibrating the Hamiltonian to compensate for its expressibility to solve ground-state energy problem of 100+ site lattice on real quantum computer. This ansatz-calibrated Hamiltonian framework enables two key advantages: (1) it allows restructuring the algorithm into smaller sub-problems which can independently solved off-line classically, leaving quantum computer tasked with recombining partial solutions into full state-vector with fewer parameters to optimize and (2) it leverages circuit-specific error statistics to de-noise observable readouts with nominal noise-mitigation overhead. We simulate the spin-1/2 antiferromagnetic Heisenberg model over a 103-site flat Kagome lattice using IBM’s Heron r1 and r2 processors. The obtained per-site ground-state energy of \(-0.4172\,J\) , which approaches the benchmark \(-0.4386\,J\) after open boundary correction and approximate error mitigation. Our experiments reveal a peculiar distribution of bond energies when the ansatz is executed on the quantum processor, in contrast to its classical simulation, which merits further investigation.
Voltage source converters (VSCs) play a critical role in modern power systems, where their simulation requires solving linear system problems and remains computationally expensive. Quantum linear system solvers, particularly the variational quantum linear solver (VQLS) tailored for noisy intermediate-scale quantum devices, offer a competitive paradigm with the potential for developing linear solvers with logarithmically scaled computational complexity. We propose Acc-VQLS, a domain-specific quantum algorithm and circuit co-optimization method that accelerates traditional VQLS for VSC simulation. We adopt constant vector-based variational quantum circuits for fast convergence with efficient initial state preparation and employ multi-core processing to parallelize the cost function evaluation and gradient computation. To demonstrate the potential applicability of Acc-VQLS in VSC operating scenarios, we employ the commonly used fault behavior model for VQLS-based VSC simulation. Quantitative experimental evaluations and comparisons across the tested benchmarks show that the proposed Acc-VQLS reduces iterations required for cost function convergence by an average of 82.5%, and our multi-core parallel computing strategy achieves a 53.9 × speedup on the AMD EPYC 9554 CPU. By incorporating a short-circuit fault in the VSC simulation, the proposed Acc-VQLS with error compensation achieves less than 10 − 9 in both the mean absolute error and the root mean square error.
Simulating quantum circuits on classical computers is challenging because conventional state-vector simulators are required to track \(2^N\) amplitudes, a resource-intensive process. While sparse simulators that exploit state-support sparsity—where only a small subset of computational basis states carry nonzero amplitudes—offer highly efficient alternatives, they lose their advantage for circuits that generate dense quantum states. To address this, we propose an adaptive simulation technique that dynamically predicts state sparsity through a rapid pre-simulation assessment. Employing a novel application, Gaussian elimination on linear constraints, the proposed approach efficiently tracks an affine subspace of the state space to estimate the number of non-zero amplitudes without complex calculations. We emphasize that our technique specifically targets state-support sparsity rather than gate-level or unitary-matrix sparsity. Overall, this approach enables the system to select between full-state and sparse-state simulations, significantly improving speed and memory efficiency for sparse circuits as well as preserving dense-circuit performance.
Reversible logic is fundamental to quantum circuit design, as quantum operations are inherently information-preserving and reversible. While most quantum synthesis methods rely on binary logic, quaternary reversible computing can increase data density, reduce circuit width, and potentially lead to more efficient realizations. We introduce a genetic-algorithm-based approach for designing compact quaternary reversible comparator circuits, which are important components in quantum architectures. This technique utilizes a gate library based on extended Shift and Muthukrishnan–Stroud gates tailored to quaternary systems. Chromosomes encode sequences of quaternary gates, and evolutionary operators search for configurations with minimal quantum cost. Although demonstrated on comparator circuits, the approach applies to any quaternary reversible circuit defined by its truth table. The synthesis process occurs in two phases: candidate circuits first evolve toward correct behavior; then correct circuits are optimized to obtain compact implementations. We evaluate the approach on comparators performing lower-than, greater-than, and equality operations, as well as on a 1-qudit full comparator. The method achieves average quantum cost improvements of about 30% for restoring and 58% for non-restoring configurations compared to existing designs. These reductions support more efficient and more error-resilient quantum circuits, showing that this approach is a strong candidate for quaternary quantum systems.