Air pollution is the second leading cause of mortality globally and is linked to numerous adverse health outcomes. Accurate estimation of air pollutant concentrations is critical for air pollution health studies. These estimates are often derived from a range of methods, including machine learning, statistical models, and chemical transport models (CTMs), but the inherent challenges of complex spatio-temporal air pollutant data pose obstacles in modeling. Although many prediction models have been developed by different research groups, their performance varies widely across space and time. Moreover, most models do not provide estimates of the spatio-temporal uncertainty in predictions, especially regarding variation across models. To address these gaps, we developed the Bayesian Nonparametric Ensemble (BNE), a machine learning algorithm that provides a structured approach for spatio-temporal ensemble prediction while incorporating uncertainty and inter-model disagreement. However, BNE is computationally intensive, particularly for predictions when applied at fine spatio-temporal resolutions for health studies. This, along with the need for regular model updates to produce predictions for recent years, requires high-performance computing (HPC) resources. In this paper, we focus on the use of HPC resources—specifically National Science Foundation-funded ACCESS HPC resources—to implement BNE for large-scale daily air pollution prediction at 1 km2 resolution across the continental U.S. from 2010 to 2016. We discuss computational challenges, including memory, data storage, and runtime limitations, and highlight parallel computing strategies. This work presents a scalable framework for air pollution prediction with spatio-temporal uncertainty, supporting advances in environmental health and policy.
Graphs are a fundamental tool for representing and analyzing relationships in data, with applications spanning social networks, the web, and the biological sciences. As the volume of data continues to grow, so too do the size and complexity of the graphs we must process. Extracting insights from these massive graphs requires scalable, high-performance algorithmsWhile many graph algorithms exhibit substantial parallelism, it is often extremely fine-grained—just a few instructions—making it difficult to exploit efficiently on conventional architectures. In this work, we demonstrate how to restructure graph algorithms to run efficiently on UpDown, a scalable, programmable accelerator designed specifically for fine-grained parallelism. UpDown enables scaling graph processing algorithms to systems with millions of concurrent hardware threadsThrough detailed simulation of UpDown systems with up to one million cores, we show that our approach achieves over 100,000× parallel speedup and absolute performance that outperforms the best reported distributed systems in terms of power efficiency. At the same time, our load-balanced approach retains strong performance at smaller scales, outperforming optimized multicore implementations under similar power budgets—all using a single, unified implementation.
GMRES(m) is a popular iterative method for solving linear systems with large, sparse, (possibly) nonsymmetric, and invertible matrices. If a matrix is not positive definite, GMRES(m) will exhibit slow or stagnating convergence behavior. Baker et al. have proposed αGMRES(mmax,mmin), which modifies the restart parameter m based on angles between consecutive residual vectors across two cycles of GMRES(m). This method results in faster convergence compared to the baseline of full-precision GMRES(m). Lindquist et al. have proposed a strategy for accelerating GMRES(m) via mixed precision arithmetic. The development of this method is motivated by the recent trend in newer GPUs offering better low-precision performance than high-precision. Although their method takes around the same number of iterations for both mixed precision and the baseline of full-precision GMRES(m), their GPU implementation results in a greater amount of low-precision parallelism offered by newer GPUs. Our work combines optimization strategies proposed by Baker et al. and Lindquist et al. We present a mixed-precision implementation of αGMRES(mmax, mmin). Our GPU implementation exhibits 47.16% better performance on average compared to full-precision GMRES(m). We also show 38.89% and 7.8% better performance with mixed-precision αGMRES(mmax,mmin) over both mixed-precision GMRES(m) and full-precision αGMRES(mmax,mmin), respectively. We are not aware of any other work that explores the effects that mixed-precision arithmetic and varied restarts have on each other.
High-performance computing (HPC) systems face challenges in jointly optimizing energy efficiency, reliability, and job throughput across heterogeneous architectures. Traditional schedulers rely on fixed heuristics that struggle under dynamic conditions and conflicting objectives. We present AIMS (Adaptive Intelligent Multi-objective Scheduler), a framework that combines uncertainty-aware deep reinforcement learning with digital twin technology for autonomous HPC scheduling. AIMS features a five-layer architecture with four predictive digital twins: fault prediction via LSTM-attention, energy forecasting using a CNN-LSTM hybrid, ensemble performance modeling, and physics-informed thermal analysis. These models supply state information to a Dueling DQN with epistemic uncertainty quantification, enabling adaptive decision-making. Policy gradient-based weight evolution drives multi-objective optimization toward Pareto-efficient scheduling. Tested on 389,620 production job records from Aurora, Polaris, Mira, and Cooley systems, AIMS outperforms ten baselines, including Slurm and PBS Pro, achieving 12.1% higher energy efficiency, 8.7% improved reliability, and 15.3% greater throughput. Under fault conditions, its uncertainty-aware design yields a performance gain of 12.8% versus 5.2% in stable settings. Scalability tests confirm real-time operation at exascale (up to 262K nodes) with sub-50ms decision latency. AIMS offers a robust and scalable solution for next-generation HPC scheduling where traditional methods fall short.
AMD-Xilinx Versal Adaptive System-on-Chip devices are powerful hardware accelerators with a variety of tools for implementing high-performance, low-power, deep-learning models. Vitis AI, a machine-learning framework created by AMD-Xilinx, accelerates deep-learning algorithms using the Deep-Learning Processor Unit (DPU), which includes a Versal-specific architecture designed to take full advantage of the unique processing elements on select Versal platforms. However, the DPU does not run efficiently for small models due to its general-purpose nature. FINN, another machine-learning framework created by AMD-Xilinx, complements Vitis AI by providing custom low-latency, high-throughput accelerators for highly quantized networks. Due to the Versal’s incompatibility with FINN’s software drivers, FINN has not yet been tested on Versal hardware against Vitis AI. In this research, we create a novel custom wrapper and driver to allow FINN accelerators to run efficiently on Versal devices. We also add preprocessing to the generated FINN accelerator to avoid bottlenecks at high levels of parallelization. We use this adjusted accelerator and wrapper to directly compare Vitis AI’s DPU against FINN-created accelerators on the Versal AI Core across two deep-learning classification models in terms of throughput, power efficiency, and device utilization. We found that for a small convolutional model designed in the original FINN research, FINN achieves a speedup of 10.1× over a DPU architecture that consumes a similar amount of power. Running MobileNetV1, the most performant (highest framerate) DPU tested achieves a speedup of 3.0× compared to the most performant FINN architecture tested, but consumes significantly more power (40.8 W vs 17.8 W). From our results, we conclude that FINN can offer better performance and power efficiency for small models and can be used as a low-power alternative to Vitis AI’s DPU on larger edge-computing models such as MobileNetV1.
