The paper is devoted to the problem of the automated construction of parallel programs. In the paper ParSolGen (Parallel Solvers Generator) - a tool that automatically constructs a highly efficient parallel program from a given numerical algorithm description is presented. It classifies the input numerical algorithm description written in ParSolGen language, determines the class it potentially belongs to and constructs the parallel program using the corresponding domain-specific parallel program construction module. This enables ParSolGen to employ well-known manual parallel programming techniques in the process of the automated parallel program construction. This approach improves the performance of the automatically generated parallel programs, as confirmed by performance tests.
Significant challenges in further increasing processors performance are caused by physical and technological limitations at the current level of hardware development. In this context, software-hardware co-design technologies gain particular importance. These technologies represent one of the promising research and development directions for the coming decades. This paper explores the prospects of implementing a new cross-product instruction in processors based on the free and open RISC-V architecture, as well as possible performance gains when solving computational tasks. We demonstrate the complete flow of performed actions, starting from the idea of implementing a new command, its prototyping, evaluating performance using the Gem5 simulator, and culminating with embedding the instruction into the GCC compiler and providing a specific usage example.
This paper is dedicated to speed-up of programs that compute convolutions and convolution type code. The automated compiler transformation of programs using floating point math to programs with integer math is considered. This transformation can lead to lower memory usage and speed-up. The application of such a transformation to the calculation of sums, dot products and to programs that calculate convolutions is studied. The application of convolutions to speed-up of the template image search algorithm is considered, performance boost is obtained compared to the known libraries. Automation of optimizing transformations of programs is performed on the basis of the optimizing parallelizing system available to the authors. Numerical experiments are given demonstrating the speed-up of the transformed program relative to the original one. Numerical experiments on the speed-up of the program achieved from transition from floating-point math to integer math are accompanied by estimates of the deviation of the calculation error of the resulting program relative to the original one. Vectorization of the convolution calculation program on the Intel-i7 processor demonstrates a 2-fold acceleration.
Didal is a distributed data library that supports development of efficient parallel fragmented programs on distributed memory supercomputers. Fragmented programming is a technology where a parallel program is represented as a collection of pieces of data (data fragments) and computations on these pieces (computation fragments), able to be tuned to the resources of a computing system and automatically provide such facilities as dynamic load balancing. While several tools for fragmented programming exist, Didal aims to get benefits from as being a simple to use C++ library, as being able to produce efficient parallel programs. In this paper we study parallelization with Didal library of RHD3D application for numerical modeling of colliding flows in relativistic hydrodynamics. Results of the parallel program’s efficiency and its comparison with Coarray Fortran implementation are provided.
The increasing core count in modern processors offers substantial potential to accelerate parallel applications. However, this also introduces key challenges: rising overhead from work distribution and diminishing per-thread workloads can significantly degrade performance. To address this, developers can exploit parallelism at multiple levels or execute multiple applications simultaneously—though this approach demands enhanced support in parallel programming models to prevent resource oversubscription. In this work, we evaluate how different programming models leverage composable parallelism to improve efficiency, focusing on OpenMP and oneTBB in the context of the Breadth-First Search (BFS) algorithm. Our experimental analysis targets Arm-based architectures, assessing scalability and overhead trade-offs.
One of the approaches to the description of complex dynamical systems is the use of cellular automata as simulation models. Such models are based on discrete mathematics. They enable relatively simple software implementations on modern supercomputers. Currently, there are no cellular automata models of electromagnetic waves that take into account such effects as reflection, refraction, diffraction, scattering, etc. The first step in developing such a model may be to build a prototype capable of simulating a two-dimensional space in which electromagnetic radiation propagates, with a set of different wave sources. A point monochromatic coherent directional source producing radiation in a selected direction can act as a basic element for the configuration of more complex types of emitters. By arranging such sources evenly along a straight line segment, it is possible to simulate a 2D variant of plane monochromatic electromagnetic wave. The paper presents a cellular automata model of a plane electromagnetic wave and its parallel software implementation. The results of computer experiments are presented, which show that the developed model corresponds to the physics of the propagation of electromagnetic waves in a homogeneous medium. A study of the performance of software implementation and the efficiency of parallelization was conducted.
Parallel programming is hard. To make it a little bit easier, various computation models and technologies are developed. However in turn they are complicated itself, making it harder to add useful features to them. One way to reduce software complexity is a modular approach, for example plugin-based. It allows to add features into software in a structured way. In this paper, a plugin-based approach is suggested to be used in the author-developed technology for parallel computing, the Parallel Programming Kit (PPK).
Widening of GPGPU applicability increases the interest to high-level languages for GPGPU programming development. One of the challenges is to create a portable solution which provides static checks and being integrated with application platforms. We propose a tool—Brahma.FSharp—that allows one to utilize OpenCL-compatible devices in .NET applications, and to develop homogeneous code using familiar .NET tools. Brahma.FSharp facilitates GPU kernel development using F# programming language that is functional-first statically typed .NET language. Compile-time metaprogramming techniques, provided by F#, allows one to develop generic type-safe kernels. We show portability of the proposed solution by running several algorithms developed with it across different platforms and devices.
Automation of high-performance programs construction is a relevant and challenging problem. Automatic construction of programs that are suitable (e.g. efficient-enough) for practical use within reasonable time critically depends on peculiarities of the target subject domain. Because of this dependency general approaches fail, explaining the diversity of languages, systems and tools developed for automating program construction in specific subject domains. To overcome these limitations, the active knowledge concept, a methodology for automatic program synthesis, proposes employing an active knowledge base—a machine-oriented formal description of a subject domain that captures its peculiarities. Using an active knowledge base significantly reduces the complexity of program construction automation while improving the quality of the resulting programs. Implementation of the active knowledge concept ideas in practice raises a number of technological issues. In the paper we present how we resolve them within the framework of the LuNA system for automatic program construction, which is based on the active knowledge concept.
In massively parallel processing (MPP) systems, an increase in data exchanges between processes often leads to higher time costs for these operations. Consequently, when the number of processes exceeds a certain threshold, the performance of a parallel program may degrade. This study examines the parallelization of an algorithm for finding the shortest path in a directed graph with cycles. The algorithm’s characteristics indicate that command-level parallelization yields limited efficiency. Meanwhile, the time complexity of the algorithm grows exponentially with increases in the number of vertices, edges, and cycles in the graph. Data-level parallelization is shown to be a viable approach. This paper presents a method to calculate the optimal number of processes for data-parallel algorithm optimization, based on the input data volume, to achieve maximum performance.
Optimizing linear algebra operations is critical for enhancing the performance of machine learning frameworks, which rely heavily on efficient matrix computations. High-performance libraries like Eigen play a pivotal role in accelerating these operations through architecture-specific optimizations. While Eigen is widely integrated into popular ML frameworks such as TensorFlow or PyTorch, its lack of support for emerging architectures like RISC-V limits its applicability in evolving hardware ecosystems. SHD Group projects that RISC-V processors will occupy 25
This study defines a small and easy-to-use language for parallel computational applications on standard and embedded hardware that brings in several original concepts and a prototypical programming environment. Embedded systems often operate on multiple processors integrated at the chip or circuit board levels and may use PC nodes for user interfacing and as computational resources. The language, π-Nets, provides SIMD and thread parallelism from scratch, and supports the distribution of threads to application-specific networks of processors structurally defined through net lists. Embedded signal processing uses fixed and block floating point data besides the common integer and floating point numbers, other applications have high precision requirements. The language supports all of these by treating the encoding of numbers chosen for some algorithm as a machine-oriented parameter for its execution, and defines algorithms for a single abstract base type of real numbers only. This greatly simplifies the type system and gives room for a few mathematical extras such as automatic differentiation or the automated handling of coordinate changes to geometric structures. While algorithms are defined in a functional style w/o using variables, threads can use them and then implement real automata. The resulting automata network is also described structurally. The language can also be used as a hardware design language (HDL) for the FPGA as a configurable hardware platform for embedded systems. Its cyclic processes then compile to parallel circuits, e.g. adders and multipliers for non-standard number codes. The current compiler environment receives program input from a standard program editor or from a text processor to dispose of special characters, and has been designed to support the GPU, multiple PC cores, and neural networks accelerator hardware also found in recent single chip systems along with an FPGA and standard processors.
In this work, we propose an approach for the execution of science-intensive applications within the framework of the concept of Workflow-as-a-Service (WaaS). WaaS platforms, being the so-called multitenant environments, provide efficient mechanisms for managing continuous and heterogeneous job-flows in cloud computing. The workflow execution schedule is built using the critical jobs method (CJM), which allows scheduling of information-dependent tasks within the directed acyclic graph (DAG) model. Nevertheless, it must be adjusted to consider the actual dynamics of the resources’ utilization during each scheduling cycle. In this scenario, along with the complexity of scheduling composite workflows, an additional problem arises to efficiently manage the cloud resources, that is, to determine the start and shutdown times of virtual machines (VMs), considering the available economic policy. To handle this problem, we propose a modification to CJM. The resulting solution combines several heuristics to optimize cloud resource management for WaaS platforms. Some experiments with the real-world workflows prove the optimization efficiency of the proposed approach.
Geological formations represent complex multiphase systems comprising elastic solid matrices and fluid-saturated pore networks. While Biot’s classical poroelastic theory has been widely adopted for wave propagation modeling, accumulated physical inconsistencies in describing dynamic filtration processes have motivated our numerical implementation of a Symmetric Hyperbolic Thermodynamically Compatible (HTC) model. This approach maintains rigorous physical validity across the complete spectrum of phase compositions in heterogeneous media. Our research focuses on optimizing parallel computation strategies for large-scale 3D wave field simulations in realistic poroelastic environments. We present a comparative analysis of two fundamental parallelization paradigms - distributed memory (MPI) and GPU-accelerated (CUDA) approaches - evaluating their computational efficiency through scalability tests. The results of numerical experiments are presented and discussed.
Efficient support of transactional and analytical queries in one database is extremely complicated since they require different approaches to storing the data. The standard solution is to separate a database into OLTP and OLAP parts, where the OLTP part is always up-to-date, while the OLAP part is maintained as fresh as possible. It is common for database entities to have a hierarchy: for example, in a social network a person can have several posts, while each post can have several comments. Unfortunately, the existing approaches do not treat subordinate entities as first-class citizens and do not allow fast scans over them; for example, scanning over comments under a specific user’s posts would be inefficient. To make such scans efficient, we need to store data for each entity in a separate structure while maintaining the consistency of the cross-entity analytical queries. Without additional synchronization, for example, while scanning comments on a specific user’s post, we could read the comments under posts that have not been committed yet. In this work, we designed an OLAP part of the storage that treats each entity in a hierarchy as a first-class citizen and maintains the consistency of analytical queries. Our implementation supports multiple concurrent analytical queries and a single writer that pulls the updates from the OLTP part. The preliminary experiments show that treating each entity as a first-class citizen improves the performance of analytical queries over subordinate entities.
This paper presents a comprehensive comparative analysis of machine learning algorithm performance under different parallel computing architectures, specifically examining MPI-based CPU parallelization and GPU acceleration strategies. We evaluate five widely-used algorithms – linear regression, polynomial regression, decision tree, random forest, and support vector regression – across three datasets of varying scales: small (2,939 samples, 25 features), medium (20,640 samples, 8 features), and large (80,000 samples, 13 features). Systematic performance evaluation was conducted using 1, 2, 4, and 8 parallel processes on both CPU and GPU platforms, measuring accuracy metrics (R2, MSE, MAE) alongside training time. Our results demonstrate that Random Forest and Support Vector Regression exhibit superior scalability and accuracy on GPU architectures, particularly for large-scale datasets where they achieve R2 values approaching 1.0. Notably, GPU-based parallel computing provides substantial improvements in prediction accuracy due to enhanced processing of larger data volumes compared to CPU implementations. The findings indicate that hybrid MPI-GPU computing systems can deliver significant performance gains for machine learning workloads, with optimal configurations varying by algorithm type and dataset characteristics. This study provides practical guidelines for selecting appropriate parallel computing strategies based on data scale and algorithm requirements, contributing to more efficient deployment of machine learning systems in high-performance computing environments.
As RISC-V architectures proliferate across embedded and high-performance domains, developers face persistent challenges in performance optimization due to fragmented tooling, immature hardware features, and platform-specific defects. This paper delivers a pragmatic methodology for extracting actionable performance insights on RISC-V systems, even under constrained or unreliable hardware conditions. We present a workaround to circumvent hardware bugs in one of the popular RISC-V implementations, enabling robust event sampling. For memory-compute bottleneck analysis, we introduce compiler-driven Roofline tooling that operates without hardware PMU dependencies, leveraging LLVM-based instrumentation to derive operational intensity and throughput metrics directly from application IR. Our open source toolchain automates these workarounds, unifying PMU data correction and compiler-guided Roofline construction into a single workflow.
Automation of parallel programming may focus on various tasks the programmer is burdened while developing a parallel program. Related tools assist the program profiling and aid the programmer with transforming the program to a form suitable for the efficient parallelization. Finally, these tools express an implicit program parallelism using a chosen programming model and optimize the parallel program for target architectures. However, the choice of the target Application Programming Interfaces (API) is of great importance in the development of interactive parallelization tools. On the one hand, the perfect choice of API should ensure the programming of the variety of modern and promising architectures. On the other hand, API must simplify the development of assistant tools and allow the programmer to explore the decisions made by the automated parallelization system. System FOR Automated Parallelization (SAPFOR) is an umbrella of assistant tools designed to automate parallel programming. It accomplishes various tasks and allows the user to take an advantage of the interactive semi-automatic parallelization. SAPFOR expresses parallelism using the DVMH directive-based programming model, which aims at developing efficient parallel programs for heterogeneous and hybrid computing clusters. The paper presents an empirical study that examines the capability of SAPFOR to assist parallel programming on the example of development of a parallel program for numerical simulation of hydrodynamic instabilities.
This paper presents innovative findings on the restructuring of code for virtual memory systems operating under a working set swapping strategy. Despite extensive research spanning five decades and numerous studies dedicated to restructuring, the persisting absence of definitive solutions has motivated this inquiry. The NP-hard problem of code block relocation across virtual memory pages to minimize cost function reflects a core challenge inherent to the problem. For ill-defined programs, many practical cluster-based solutions lack a quantifiable approximation error to the unknown optimal or ε-optimal solution. This paper elucidates the computational process by offering a geometric interpretation, enabling the construction of a combinatorial mathematical model of the restructuring process. This model incorporates both functional elements and constraints to define acceptable solutions. The unique aspects of the model provide a foundation for subsequent research aimed at designing an algorithm that delivers an optimal or ε-optimal solution to the original problem, with some algorithmic details discussed herein. The model also paves the way for the development of a swift, cost-effective working set-like swapping algorithm, amplifying the applicability of the results obtained.
Parallel versions of the reduced exhaustive search algorithm based on the Python tools are implemented to optimize chordal ring networks, which are of practical interest in the design of systems on a chip and supercomputer systems. An analysis of the effectiveness of parallel programs with different numbers of MPI processes on Kunpeng processors was carried out. The speed-up of several parallel computing schemes was experimentally evaluated and analyzed. The large dataset of all optimal chordal networks with numbers of up 6 · 10^4 nodes was generated for the first time. A preliminary analysis of experimentally obtained dataset has been carried out and the existence of new families of optimal chordal ring networks with analytical descriptions of parameters has been discovered.
