A compact V-band single-chip receiver compatible to flip-chip technology is demonstrated using 0.15 mu m mHEMT (metamorphic high electron mobility transistor) technology. The image rejection receiver consists of a three-stage low-noise amplifier, a 3xLO multiplier chain and an image rejection subharmonic downconverter. Only the input match network of the first-stage LNA is utilized with the coplanar waveguide with backside ground (CPWG) for compatibility with the flip-chip technology and the rest of matching networks are utilized with the microstrip (MS) transmission lines for a small size. mHEMT devices with through-substrate vias are employed as CPWG to MS transition. The flip-chip mHEMT V-band receiver with the chip size of 4.3 mm x 2.4 mm achieves conversion gain of 4.8 dB and noise figure is 7.7 dB at 59 GHz. The best image rejection ratio of 28 dB occurs at 60 GHz.
This paper presents a polyphase systolic array for implementing a 512-tap digital FIR filter on the Xilinx RF-SoC ZCU-111 platform using a matrix-vector multiplier core. The design is tailored for high-speed real-time applications and supports dynamic coefficient assignment. The proposed architecture is designed from scratch instead of using Xilinx-provided FIR cores to accommodate the configurability of high tap counts, parallel processing, adaptive coefficient updates in real-time RF applications, and portability for any FPGA or ASIC platforms. In addition, this custom design leverages multiplier symmetry and pipelining. Real-time operations across 8 parallel data paths processing at 256 MHz on RF-SoC digital fabric leading to 1 TeraMAC/s throughput. The digital architecture is verified using a low-pass filter and a bandpass filter. Thus, experimental results demonstrate successful realization of the custom designed FIR filter core in wide band signal processing scenarios in advanced wireless communication, RF AI/ML applications, spectrum sensing, electronic warfare (EW), and signal intelligence applications.
This paper presents a quasi-Yagi antenna direct antenna modulation (DAM) for wideband digitally controlled phase modulation. A compact transistor-based switching network, driven by two DC bias voltages, enables dynamic feed direction control, achieving 180 degrees far-field phase shifts over a wide frequency range. A 1D array of four DAM elements is fabricated and measured, showing strong agreement with simulations and effective beam steering across multiple digital states, within 1-GHz bandwidth covering the Wi-Fi 6E frequency range. The proposed quasi-Yagi DAM features low complexity and wideband digital reconfigurability, offering a promising solution for future 6G wireless communication and Internet-of-Things (IoT) applications.
The SpectrumX Mobile Experiment Platform (MEP) is an software radio instrument designed to support a wide range of spectrum experiments. It is capable of passive data acquisition as well as active transmission to enable research into signal propagation and waveform co-existence. The mobile instrument includes an analog front-end with calibration, positioning, and timing features, a field-programmable gate array (FPGA) radio, and an Artificial Intelligence (AI) compute platform for on-instrument data processing. Four synchronous receive channels and two transmit channels operate up to 6 GHz, with an optional wide-band tuner. The hardware, firmware, and software for the MEP are extensible and reproducible, with components available through a combination of off-the-shelf hardware and rapid prototyping fabrication. More than a dozen MEPs have been constructed through student workshops and are being used for ongoing field experiments. This paper details the design of the MEP, including component selection and initial testing.
Delicate components in the front ends of sensitive RF receivers are vulnerable to damage from high-powered signals. RF limiters are crucial in protecting components downstream of the receive antenna by attenuating high-amplitude inputs to safe levels while maintaining receiver sensitivity and dynamic range. This paper presents the characterization of eight limiters in passive, quasi-active, and active topologies. The gain, output power, and OIP3 of each limiter is measured with a -10 to 40 dBm input at 1 GHz. The results demonstrate that these designs and their cascade into multi-stage structures can provide a high-power tolerant and adjustable RF limiter with flexible performance required for receivers in integrated sensing and communications (ISAC) applications.
