A novel 3D RRAM concept using a stackable multi layer 1TXR memory cell structure is proposed The access transistor is fabricated in silicon which has excellent affinity to the standard CMOS process Using an 8 layer metal of stacked 1TXR (X=64) as an example the density is over 260% higher than that of the conventional single layer 1T1R structure Further a corresponding operation algorithm is put forward which can inhibit effectively mis write and mis read caused by sneaking current and reduce power consumption