CMOS Electronic Synaptic Circuit Based on an Active Substrate Charge Injection Mechanism

Electronic synapses are fundamental components of efficient, large-scale neuromorphic computing systems because they enable continuous weight modulation and hardware-level plasticity. The standard CMOS-based synaptic approach has been widely studied due to its superior process compatibility and high integration density. However, the existing design relies on impact ionization under a high electric field to generate carriers to finish conductance modulation through the back-gate effect, during which a fraction of hot carriers are injected into the gate oxide, inducing a decrease in the threshold voltage with nonlinear characteristics, thereby reducing the achievable conductance ratio and degrading the accuracy of neuromorphic computing. To address this limitation, we propose a MOSFET-based electronic synapse circuit that effectively prevents carrier injection into the gate oxide through an active substrate charge injection mechanism. By constructing a tunable current branch to implement charge injection into and release from the substrate, the synaptic conductance is regulated solely by the active injection branch, rather than being simultaneously affected by charge injection into the gate oxide as in the existing scheme. Therefore, this approach effectively enhances the conductance ratio. Simulation results indicate that the proposed electronic synapse achieves a conductance ratio of approximately 105, a coefficient of determination of R2 = 0.96 for the weight-update behavior, and nonlinearity factors of 0.09 and -0.26 for synaptic weight potentiation and depression, respectively, while exhibiting strong robustness against process and temperature variations.