Dynamic Coding Technique for Low-Power Data Bus

Designing chips for lower power applications is one ofthe most important challenges faced by the VLSI designers.Since the power consumed by I/O pins of a CPU is a significant source of power consumption, work has been doneon developing encoding schemes for reducing switching activity on external buses. In this paper, we propose a newcoding technique, namely, the Dynamic Coding Scheme,for low-power data bus. Our method considers two logical groupings of the bus lines, each being a permutation ofthe bus lines, and dynamically selects that grouping whichyields the minimum number of transitions.