2025 IEEE INTERNATIONAL TEST CONFERENCE IN ASIA, ITC-ASIA(2025)
Siemens EDA
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摘要
As the industry advances towards smaller geometries for integrated circuits (ICs), internal cell defects have become increasingly crucial to address. Cell-Aware Testing (CAT) has emerged as the industry standard for achieving the high-quality levels required in modern ICs, as it explicitly targets intra-cell defects. However, the comprehensive defect coverage provided by CAT can result in a high test pattern count, which directly impacts test time and production costs.This paper proposes two complementary methodologies to optimize the cell library characterization phase by leveraging weak detections to maximize the number of Don’t Cares (DCs) and equivalent defects. The proposal produces an optimized Defect Detection Matrix (DDM) for the library, which is then used by the ATPG for pattern generation at the design level.The methodologies have been validated by running CAT ATPG for five different designs, using a 65nm cell library characterized with the proposed approach. The experimental results show that using the optimized DDMs reduces the number of patterns by an average of 8% and the pattern generation time by 11%, depending on the methodology used and the circuit analyzed.
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关键词
Cell-Aware Test,Defect-based Test,Automatic Test Pattern Generator,Equivalent Defects