Integrated multistep process simulation with chip-scale structures

We discuss the integration of process simulations for several process steps in the fabrication of a simple Damascene structure. Starting with a blanket silicon dioxide substrate and a patterned mask, we perform simulations of plasma etching, PVD barrier deposition, PVD seed layer deposition, electrochemical deposition of copper using an additive-containing bath. We then simulate chemical mechanical polishing to banks of trenches formed from these results to study "chip-scale" effects; e.g., pad bending. This virtual process sequence demonstrates the use of process simulation to study not just individual process steps, but process flows. Finally, we present an example of a fully 3d/3d simulation into a dual Damascene structure; a situation for which 2d/2d simulation would not provide quantitatively correct results [I].