Sputtered Ta films (60 nm) were deposited at room temperature onto selected substrates, including silicon, SiO2, porous methyl silsesquioxane (porous MSQ), parylene-N (Pa-N) caulked porous MSQ, benzocyclobutene (BCB), and SiLK layers. It was observed that the Ta structure after deposition mainly depends on the underlayer surface chemistry. beta-Ta with a resistivity of similar to 130-160 mu Omega cm and an average grain size of similar to 20 nm was observed after sputter depositing 60-nm-thick Ta films onto the oxygen-rich materials of native oxide of Si, SiO2, and porous MSQ. alpha-Ta with a much lower resistivity (similar to 35 mu Omega cm) and an average grain size of similar to 16 nm was observed after sputter deposition of Ta onto a substrate with a 4-nm-thick hydrocarbon Pa-N film on porous MSQ. a-Ta was also formed when sputter depositing on the hydrocarbon BCB and SiLK lokw-K dielectrics. The lattice constants of the alpha-Ta films were slightly larger (3.310-3.351 angstrom) than those of the bulk Ta (3.305 angstrom). (c) 2006 American Vacuum Society.

Integration issues have plagued the introduction of ultra-low kappa dielectrics. It was hoped that the same processes developed for low k dielectrics could be transferred to their porous analogues. This has not been the case since porosity adds challenges of mechanical robustness of the dielectric as well as metallization issues. Molecular Caulk, initially developed with the chemical vapor depositable parylene N, has addressed many these issues. In particular it fracture toughens the porous dielectric while hermetically sealing the surface of the vulnerable dielectric to moisture as well as wet chemical agents such as TMAH. A new robust material, parylene X, is a cross-linkable hydrocarbon chemistry that has all the benefits of parylene N (fracture toughness improvement, low dielectric constant, pore sealing, selectivity, etc...) but has improved thermal stability, does not readily crystallize and therefore has reduced anisotropy, and potentially superior mechanical properties.

We discuss the integration of process simulations for several process steps in the fabrication of a simple Damascene structure. Starting with a blanket silicon dioxide substrate and a patterned mask, we perform simulations of plasma etching, PVD barrier deposition, PVD seed layer deposition, electrochemical deposition of copper using an additive-containing bath. We then simulate chemical mechanical polishing to banks of trenches formed from these results to study "chip-scale" effects; e.g., pad bending. This virtual process sequence demonstrates the use of process simulation to study not just individual process steps, but process flows. Finally, we present an example of a fully 3d/3d simulation into a dual Damascene structure; a situation for which 2d/2d simulation would not provide quantitatively correct results [I].

We describe an approach to studying grain structure formation and evolution in polycrystalline thin films using a ''grain continuum'' representation of the solid. Formation and evolution of grain structure are tracked using level-set-based geometry software we call PLENTE. We demonstrate the approach using two processes; (1) vapor deposition and (2) grain boundary migration during curvature-driven coarsening. We employ several codes in concert to track the development of grains during deposition while accounting for reaction kinetics, ballistic transport, and re-emission of reactive species.

We perform simulations of plasma etching of vias and trenches into porous dielectric substrates using a combination of three different process simulation codes in concert to solve different aspects of the problem for this 3D problem. We show results from both physical etches and reactive ion etches. We observe that re-entrant sub-structures with etched features are common as pores are opened up (the partially etched pores). We also simulate deposition of barrier films into the etched features, discussing some problems associated with sealing the exposed pores. We conclude with a discussion of the roles of 2D and 3D simulation for such 3D systems.

The parallel levelset environment for nanoscale topography evolution (PLENTE) [Bloomfield et al.], and a simple grain boundary migration model are used to investigate the evolution of grains in polycrystalline metallic interconnects. The driving force in this grain boundary migration model is the elimination of stir-face energy associated with grain boundaries, in a process activated by temperature. The mass fluxes of material parallel to grain boundaries and along the metal-barrier interface are considered to be small compared to motion transverse to the grain boundaries. The initial films, formed by electroless deposition simulations, exhibit approximately log-normal distributions of grain sizes. During the annealing simulations, the structures begin to coarsen, with larger grains swallowing smaller grains, and the log-normal grain-size distributions become bimodal. Computed trends are similar to those experimentally observed in high temperature annealing and low temperature "self-annealing" of copper [Zielinski et al.]. The timescales of the simulated annealing processes compare qualitatively with experimental timescales, using representative physical and energetic parameters from the literature.

We have developed a transient, Boltzmann equation based transport and reaction model at the feature scale for atomic layer deposition (ALD). Heterogeneous reaction mechanisms are used to express adsorption, desorption, and surface reaction steps. Simulation results show that transport is fast compared to typical processing times. An analytic extension of the simulation results indicates that approximately one third of one monolayer is deposited per cycle, for the representative choice of coefficients used. We use the example surface reaction model to explain growth rate dependence on pulse times for a specific experimental chemistry for TiN ALD using TiI4 and NH3.

Interest in atomic layer deposition (ALD) has recently increased, particularly in the area of integrated circuit fabrication. This interest is due to its potential to deposit uniform films in high aspect ratio features. However, film nonuniformities have been observed in practice. To study potential sources of nonuniformities, we have developed a Boltzmann equation based transport and reaction model for ALD. The transport model has no adjustable parameters. Heterogeneous reaction mechanisms are used to express adsorption, desorption, and surface reaction steps. The parameters of these kinetic processes are those appropriate to a specific system, or can be chosen for demonstration purposes. In this paper, we focus on the adsorption of one species. The results for transient behavior of the number density and the surface coverage indicate that the experimentally observed nonuniformities may not he caused by the behavior of the adsorption step in ALD.

This paper describes a model that predicts sub-ambient fluid pressures often found at the wafer/pad interface during CMP processes. A fully three-dimensional finite element analysis (FEA) is used to calculate the stress and deformation field of the compliant polishing pad of finite thickness in contact with a rigid wafer. Pad deformation is governed by the classical linear elasticity equations. The Greenwood-Williamson contact model for curved surfaces connects the solid contact stress of the pad asperities to the effective fluid film height of the slurry flow. A FEA of fluid flow is then done to understand the characteristics of slurry flow at the wafer/pad interface. The slurry is assumed to be a Newtonian fluid. The slurry flow is modeled using the Reynolds equation for thin channel flow with unidirectional velocity distributions. The proposed model can predict sub-ambient fluid pressures at the wafer/pad interface, and the predictions agree reasonably well with experimental results. The skewed contact stress due to friction shows greater contact stress at the leading edge, where slurry enters into the wafer/pad interface. Greater contact pressure causes a thinner film at the leading edge, and such a net diverging fluid film results in negative fluid pressure. The highly non-uniform sub-ambient fluid pressure with skewed contact stress can significantly affect achieving both local and global planarization of the wafer surface.

We discuss selected modeling and simulation opportunities that are particularly important to the design and processing of 3D ICs, though they are relevant to traditional 2D ICs as well. Processes we focus on are atomic layer deposition and electrochemical deposition. Physical design issues highlighted are the stability of copperibarrier filled through-wafer vias in silicon, and a new approach to thermal modeling.

An integrated simulator for chemical vapor deposition is introduced. In addition to reactor scale and feature scale simulators, it includes a mesoscopic scale simulator with the typical length scale of a die. It is shown that the three-scale integrated simulator used is a proper extension of two-scale deposition simulators that consist of reactor scale and feature scale simulation models. Moreover, it is demonstrated that information is provided on a new length scale, for which no information is available from the two-scale approach, as well as important corrections to the simulation results on the reactor scale. This enables, for instance, studies of microloading. Thermally induced deposition of silicon dioxide from tetraethyoxysilane is chosen as the application example. The deposition chemistry is modeled using six gaseous reacting species involved in four gas-phase and eight surface reactions.

We use mixtures of FASi-4 and oxygen to deposit SiOxFy films, using a remote microwave plasma enhanced CVD system. For the deposition conditions studied, the deposition rate increases with increasing substrate temperature, increasing absorbed microwave plasma power, and decreasing total reactor pressure, independent of the O-2:FASi-4 flow ratios. A maximum deposition rate of similar to 120 Angstrom/min was obtained at a substrate temperature of 450 degrees C, an absorbed microwave plasma power of 250 W, and a total reactor pressure of 0.25 Torr. RES results indicate that increasing the O-2:FASi-4 ratio from 8:1 to 15:1 decreases the fluorine content in the films from 8.0 to 2 at. %. FTIR results indicate no absorbed moisture, and a shift in the peaks of the Si-O bond from similar to 1060 and similar to 805 cm(-1) for conventional oxides to similar to 1085 and similar to 815 cm(-1) for the deposited SiOxFy films. The dielectric constant of the films is found to decrease from 3.68 to 3.6 with an increase in the fluorine content in the films from 2 to 8 at. %.

A model designed to deal with pattern dependences of deposition processes is discussed. It is a mesoscopic scale model in the sense that it deals with spatial scales on the order of 10(-3) to 10(-2) m, which is intermediate between reactor scale and feature scale. This model accounts for the effects of the microscopic surface structure via suitable averages obtained by a homogenization technique from asymptotic analysis. Two studies on the low pressure chemical vapor deposition of silicon dioxide from tetraethoxysilane are presented to demonstrate the mesoscopic scale model. The first study shows the effects of microloading in regions of higher feature density. The second study shows the Effects of varying operating conditions on loading and introduces a generalized Damkoehler number, which includes information about the surface patterns, for quantifying the degree of transport limitations. Some thoughts on how this model can be used to bridge reactor scale and feature scale models are presented.

We present the application of optimal control theory to the process of low pressure chemical vapor deposition (LPCVD) on patterned surfaces. An optimally controlled CVD protocol is developed by employing an approximate feature scale model, based on the simultaneous one-dimensional Knudsen diffusion and chemical reaction description of LPCVD, for the specific problem of maximizing throughput for a specified step coverage. The corresponding control conditions for the reactor are obtained by an adaptive solution of the inverse problem for the reactor scale model. Rigorous process simulations demonstrate that the computed temperature and partial pressure trajectories provide good step coverage.

In this paper, a reduced order, physically-motivated empirical model is proposed and validated via simulation for the single wafer tungsten low pressure chemical vapor deposition (LPCVD) processing step. The so-called multiple response surface method is adopted to describe the spatial deposition nonuniformity across a wafer surface. Based on this modeling methodology, a simple adaptive optimization control strategy is developed by which the average deposition thickness at the wafer surface is controlled to a desired level while its variation of the state across the wafer surface is minimized. Simulation results demonstrate the effectiveness of the control strategy and its potential capability of rejecting disturbances during the process. In this study, a simulation platform (CFDSWR) is used to represent the single wafer tungsten LPCVD process. The control strategy introduced here is quite general and applicable to other processing steps as well

In this paper, Optimal Control theory is applied to develop an alternative process protocol in single wafer reactor LPCVD on patterned wafer in an effort to minimize the processing time, for given final step coverage. To achieve this, the operating conditions are changed during the deposition in a prescribed manner. A simplified control model is developed from the simultaneous one-dimensional Knudsen diffusion and chemical reaction description. The optimal control problem is formulated to find a temperature trajectory yielding the minimum processing time and its solution is computed numerically via a modified variation of extremals method. To demonstrate the concept of optimal control CVD (OCCVD), we consider the thermally activated deposition of silicon dioxide (SiO2) from tetraethylorthosilicate (TEOS). Using the simplified control model, the estimated process time to achieve a 96% step coverage at 98% closure with the constant rate CVD (CRCVD) strategy is 729 seconds. Under the same conditions, the optimal control CVD (OCCVD) process time is 278 seconds. Compared to CRCVD, the process time saved with OCCVD is 62%

We introduce a novel modeling technique, in an effort to develop a physically-motivated empirical model of the deposition rate and spatial deposition nonuniformity for a single-wafer tungsten silicide low pressure chemical vapor deposition (LPCVD) processing step. In general, such a description is difficult to obtain due to the complexity of the mapping between the spatial nonuniformity and manipulated variables. Combining the so-called multiple response surface method with a "feedback-like" model structure, relating reactant partial pressures with manipulated variables, we develop a reasonably accurate description of the deposition rate and spatial deposition nonuniformity across wafer surface. This model offers good fitting accuracy with fewer adjustable parameters compared with the more traditional polynomial-structure models. Further, based on this modeling methodology, we derive a run-to-run adaptive control/optimisation strategy aiming to achieve prescribed values of the average deposition rate and silicon to tungsten ratio at the wafer surface, while minimizing the variation of the deposition rate across the wafer surface.