Optimal Loop Parallelization under Register Constraints

: This report deals with the interaction between instruction schedulingand register allocation, in the case of straight line code and in the case ofloops. This problem is at the heart of code optimization in microprocessors withinstruction-level parallelism. Usual solutions use heuristics based on a decoupledapproach. We propose here a formulation by linear integer programming, thatallows dependence, resource and register constraints to be integrated in the sameframework . By varying the...