Read-voltage-reconfigurable Logic-in-memory Enabled by an Ambipolar MoTe 2 Split-Gate Transistor

Abstract Reconfigurable logic-in-memory devices are attracting increasing attention for compact and energy-efficient computing architectures, yet most existing approaches rely on complex device structures or additional control circuitry to achieve logic reconfiguration. Here, we demonstrate an ambipolar MoTe 2 split-gate field-effect transistor incorporating a charge-trap gate stack that enables logic polarity reconfiguration solely through the selection of the read voltage, without any modification of the device structure or gate configuration. The split-gate electrodes provide local electrostatic control of the channel polarity, while charge trapping induces a programmable threshold-voltage shift, leading to butterfly-shaped hysteresis in the transfer characteristics. By exploiting this behavior, AND and NOR logic operations are realized within a single device through read-voltage-controlled polarity switching. The device exhibits a large threshold-voltage window of approximately 3 V. and stable retention of the stored logic states for up to 1000 s. These results highlight a compact and hardware-efficient route toward reconfigurable logic-in-memory platforms based on ambipolar two-dimensional semiconductors.