2025 ACM/IEEE 7th Symposium on Machine Learning for CAD (MLCAD)(2025)
Department of Electrical and Computer Engineering
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摘要
With the desire for hardware design automation, large language models (LLMs) are being increasingly incorporated into the IC design flow to assist in register transfer level (RTL) generation, IP development acceleration, reduction of time-to-market (TTM), and satisfying the demands of modern applications such as AI accelerators. However, they do not incorporate security considerations when generating the designs. Our initial investigation reveals that RTL code created by leading LLMs such as OpenAI’s ChatGPT [1], Google DeepMind’s Gemini [2], and xAI’s Grok [3] can exhibit important security flaws, such as improper handling of registers, nonsecure datapaths, and missing access controls, that may lead to information leakage or system malfunction in security-critical applications. Of 42 LLM-generated designs on 7 different models, 74% of the designs contained at least one security vulnerability that compromises the confidentiality, integrity, and availability of these designs. Although AI-driven automation presents a significant benefits in hardware design flows, our study indicates that RTL designs are not secure and specific mechanisms should be taken to mitigate vulnerabilities while using the benefits of LLMs. From this paper’s security investigation, we can sufficiently suggest that using CWE-guided prompting, formal property checks, and FSM-level structural validation can help mitigate vulnerabilities during LLM-guided RTL generation.
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关键词
large language model,computer-aided design,register transfer level,hardware security,automation