三维测力传感器和应用三维测力传感器的手术微器械指尖

NOVELTY - The device has rising strobe signal generation units (331, 332) generating rising strobe signals in response to rising and falling delay locked loop (DLL) clock signals, respectively, where the rising strobe signals have opposite phases and are activated at same timing. Falling strobe signal generation units (333, 334) generate falling strobe signals in response to the falling and rising DLL clock signals, respectively, where the falling strobe signals have opposite phases and are activated at same timing.

USE - Semiconductor memory device i.e. double data rate synchronous dynamic RAM (DDR SDRAM).

ADVANTAGE - The device removes a skew between the clock signals by individually generating the clock signals used for a final data output, so that the clock signals are activated at the same timing, thus ensuring a data valid window of outputted data in a sufficient manner and improving deviation of output cross point voltage from termination voltage characteristics.

DESCRIPTION OF DRAWING(S) - The drawing shows a block diagram of the semiconductor memory device.

Delay locked loop (310)

Rising strobe signal generation units (331, 332)

Falling strobe signal generation units (333, 334)

Data output unit (350)