专

识别猴痘病毒核心蛋白A29L的单克隆纳米抗体、应用及单克隆纳米抗体文库

12620210232220A

发明人

方绪凤, 段静, 杨查理, 秦伏波, 鲁亮, 万定一, 代腾飞, 张永霞

受让人

普健生物（武汉）科技有限公司

申请人

CASTENBRANDT GOSTA

申请号

110299

申请日

1988-03-17

公开(公告)号

12620210232220A

公开(公告)日

2018-01-08

IPC分类号

A61K031/618C07C311/17C07C069/88A61K031/18A61K031/235A61P013/08A61P035/00C07C067/08C07C067/48A61K036/09A61P021/00C07C303/44C07C067/58C07C069/84A61K036/00A61K036/18C07C051/47C07C065/03C07C067/56A01N043/00A61K031/33A61K031/167A61K031/277A61K031/4174A61K031/573C07B063/00

CPC分类号

优先权号

029622

优先权日

1984-02-20

摘要

NOVELTY - The apparatus (200) has a light emitting unit (210) outputting a laser toward an aspherical mirror before deposition. A camera (220) obtains an image by photographing a screen on which the laser reflected from the mirror is projected. A processor (250) is electrically connected to the unit, the camera and a display unit (240). The processor identifies a projection position, where the reflected laser is projected on the screen through the acquired image. The processor inspects surface quality of the mirror before the deposition based on the position of a head-up display set. The processor is set to control movement of the light emitting unit located on the upper part of the pre-deposition aspherical mirror such that the laser is output to the entire surface of the pre-deposition aspherical mirror.

USE - Apparatus for inspecting surface quality of an aspherical mirror before deposition of a head-up display i.e. augmented reality device.

ADVANTAGE - The device identifies projection position of the laser projected on the screen and inspects surface quality of the aspherical mirror before deposition based on the identified projection position so as to save manufacturing cost and time due to surface defects after deposition. The device outputs the inspection results of the surface quality on the display unit, so that a manager can intuitively check whether there is a defect or not.

DETAILED DESCRIPTION - Independent claims are also included for : a method for inspecting surface quality of an aspherical mirror before deposition of a head-up display; and a a computer readable storage medium for storing a set of instructions for a method for inspecting surface quality of an aspherical mirror before deposition of a head-up display.

DESCRIPTION OF DRAWING(S) - The drawing shows a block diagram of an apparatus for inspecting surface quality of an aspherical mirror before deposition of a head-up display(Drawing included non-English language text).

200Apparatus for inspecting surface quality of an aspherical mirror before deposition of a head-up display

210Light emitting unit

220Camera

230Memory

240Display unit

250Processor

权利要求

1. An apparatus for controlling a switched-mode power supply converting a source voltage into a supply output voltage, wherein said supply output voltage is indicative of a reference voltage, and wherein said power supply comprises a switch providing a switching voltage and controlled by a control signal, the apparatus comprising: a) an integrator characterized by an integration time constant and operable to receive an integrator input signal and to produce an integrator output signal, wherein said integrator output signal is proportional to an antiderivative of said integrator input signal; and b) a Schmitt trigger characterized by a hysteresis gap and operable to receive a Schmitt trigger input signal and to output said control signal; wherein said integrator input signal comprises a first integrator input component proportional to said switched voltage and a second integrator input component proportional to said reference voltage, and wherein said Schmitt trigger input signal comprises a first Schmitt trigger input component proportional to said integrator output signal; wherein said Schmitt trigger input signal comprises a second Schmitt trigger input component proportional to said supply output voltage and a third Schmitt trigger input component proportional to a frequency control signal, wherein said switching voltage is characterized by a switching frequency, and wherein said switching frequency is indicative of a frequency of said frequency control signal.

2. The apparatus of claim 1 wherein said frequency control signal is a periodic signal characterized by a time period, and wherein said time period is inversely proportional to said switching frequency.

3. The apparatus of claim 1 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

4. The apparatus of claim 3 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

5. The apparatus of claim 1 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

6. The apparatus of claim 5 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

7. The apparatus of claim 1 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

8. The apparatus of claim 7 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

9. The apparatus of claim 2 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

10. The apparatus of claim 9 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

11. The apparatus of claim 1 wherein said frequency control signal is selected from the group comprising: a random signal, a periodic signal, and any combinations thereof.

12. The apparatus of claim 1 wherein said switch is selected from the group consisting of a synchronous switch and an asynchronous switch.

13. The apparatus of claim 12 wherein said Schmitt trigger input signal further comprises a second Schmitt trigger input component proportional to said supply output voltage.

14. The apparatus of claim 13 wherein said Schmitt trigger input signal further comprises a third Schmitt trigger input component proportional to a frequency control signal, wherein said switching voltage is characterized by a switching frequency, and wherein said switching frequency is indicative of a frequency of said frequency control signal.

15. The apparatus of claim 14 wherein said frequency control signal is a periodic signal characterized by a time period, and wherein said time period is inversely proportional to said switching frequency.

16. The apparatus of claim 12 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

17. The apparatus of claim 16 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

18. The apparatus of claim 13 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

19. The apparatus of claim 18 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

20. The apparatus of claim 14 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

21. The apparatus of claim 20 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

22. The apparatus of claim 15 wherein said integrator input signal further comprises a third integrator input component proportional to said supply output voltage.

23. The apparatus of claim 22 wherein said integrator input signal further comprises a fourth integrator input component proportional to said source voltage.

24. The apparatus of claim 14 wherein said frequency control signal is selected from the group comprising: a random signal, a periodic signal, and any combinations thereof.

说明书

[0001]FIG. 1 is a front view of a display screen or portion thereof with graphical user interface according to a first embodiment of the subject matter described herein; and, FIG. 2 is a front view of a display screen or portion thereof with graphical user interface according to a second embodiment of the subject matter described herein. The broken lines represent portions of the display or portion thereof with graphical user interface that form no part of the claimed design. The outermost perimeter of broken lines depicts the display screen or portion thereof and form no part of the claimed design.

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