1 . A semiconductor device, comprising: a substrate; a first fin-shaped semiconductor layer spaced apart from the substrate, wherein the first semiconductor layer extends along a curved longitudinal extending direction; and a second semiconductor layer at least partially surrounding a periphery of the first semiconductor layer.
2 . The semiconductor device according to claim 1 , further comprising: an isolation layer formed on the substrate, wherein the second semiconductor layer is at least partially exposed by the isolation layer, and an exposed portion of the second semiconductor layer extends in a fin shape; and a gate stack formed on the isolation layer and intersecting the second semiconductor layer.
3 . The semiconductor device according to claim 2 , wherein the second semiconductor layer at least partially surrounding the periphery of the first semiconductor layer is located between the first semiconductor layer and the gate stack.
4 . The semiconductor device according to claim 1 , wherein the first semiconductor layer is substantially “C” shaped or “S” shaped.
5 . The semiconductor device according to claim 1 , wherein the first semiconductor layer comprises a first portion and a second portion along the longitudinal extending direction thereof, and the second semiconductor layer comprises a first portion at least partially surrounding a periphery of the first portion of the first semiconductor layer and a second portion at least partially surrounding a periphery of the second portion of the first semiconductor layer.
6 . The semiconductor device according to claim 2 , wherein the first semiconductor layer comprises a first portion and a second portion along the longitudinal extending direction thereof, the second semiconductor layer comprises a first portion at least partially surrounding a periphery of the first portion of the first semiconductor layer and a second portion at least partially surrounding a periphery of the second portion of the first semiconductor layer, and the gate stack comprises a first gate stack intersecting the first portion of the second semiconductor layer and a second gate stack intersecting the second portion of the second semiconductor layer.
7 . The semiconductor device according to claim 5 , further comprising: a dielectric layer extending in a direction intersecting the longitudinal extending direction of the first semiconductor layer, wherein the dielectric layer isolates the first portion of the first semiconductor layer from the second portion of the first semiconductor layer and isolates the first portion of the second semiconductor layer from the second portion of the second semiconductor layer.
8 . The semiconductor device according to claim 1 , further comprising: a supporting portion through which the first semiconductor layer is physically connected to the substrate.
9 . The semiconductor device according to claim 8 , wherein the first semiconductor layer has a portion connected to the supporting portion, which has an extent, in the longitudinal extending direction of the first semiconductor layer, less than a length of the first semiconductor layer in the longitudinal extending direction.
10 . The semiconductor device according to claim 8 , wherein the supporting portion comprises a laterally extending portion extending along the surface of the substrate and a vertically extending portion extending in a direction substantially perpendicular to the surface of the substrate, wherein the vertically extending portion extends onto vertical sidewalls of the first semiconductor layer along the direction substantially perpendicular to the surface of the substrate.
11 . The semiconductor device according to claim 10 , wherein the vertically extending portion of the supporting portion extends on the vertical sidewalls on opposite sides of the first semiconductor layer to sandwich the first semiconductor layer.
12 . The semiconductor device according to claim 8 , wherein the supporting portion is positioned at opposite ends of the first fin-shaped semiconductor layer.
13 . The semiconductor device according to claim 2 , wherein the isolation layer fills a spacing between the first semiconductor layer and the substrate and a spacing between the second semiconductor layer and the substrate.
14 . The semiconductor device according to claim 2 , wherein the isolation layer has a portion under the second semiconductor layer, which is contiguous to the second semiconductor layer, and has remaining portions whose top surface is closer to the substrate than a bottom surface of the second semiconductor layer facing the substrate.
15 . The semiconductor device according to claim 14 , wherein the isolation layer has an undercut under the second semiconductor layer.
16 . The semiconductor device according to claim 1 , wherein the first semiconductor layer comprises Si, and the second semiconductor layer comprises Ge, SiGe, or a III-V compound semiconductor.
17 . A method of manufacturing a semiconductor device, comprising: forming, on a substrate, a first fin-shaped structure and a second fin-shaped structure extending along a curved longitudinal extending direction, wherein the first fin-shaped structure is stacked on the second fin-shaped structure; forming a supporting portion for supporting the first fin-shaped structure on the first fin-shaped structure and the second fin-shaped structure; at least partially removing a portion of the second fin-shaped structure which is close to the bottom of the first fin-shaped structure, so that the first fin-shaped structure is spaced apart from the second fin-shaped structure to form a first semiconductor layer; and growing a second semiconductor layer with the first semiconductor layer as a seed layer.
18 . The method according to claim 17 , wherein the second fin-shaped structure comprises a sacrificial layer formed on the substrate, and the first fin-shaped structure comprises the first semiconductor layer stacked on the sacrificial layer.
19 . The method according to claim 18 , wherein forming a first fin-shaped structure and a second fin-shaped structure comprises: patterning the first semiconductor layer and the sacrificial layer in sequence into the fin-shaped structure.
20 . The method according to claim 18 , wherein at least partially removing a portion of the second fin-shaped structure which is close to the bottom of the first fin-shaped structure comprises: selectively removing the sacrificial layer.
21 . The method according to claim 17 , wherein the second semiconductor layer is grown by a selective growth method.
22 . The method according to claim 17 , further comprising: forming an isolation layer on the substrate to at least partially expose the second semiconductor layer, wherein an exposed portion of the second semiconductor layer extends in a fin shape; and forming a gate stack intersecting the second semiconductor layer on the isolation layer.
23 . The method according to claim 22 , wherein the isolation layer fills a spacing between the first semiconductor layer and the substrate and a spacing between the second semiconductor layer and the substrate.
24 . The method according to claim 17 , wherein the first semiconductor layer is formed in substantially a “C” shape or an “S” shape.
25 . The method according to claim 17 , wherein forming a supporting portion comprises: forming a film material on the substrate with the first fin-shaped structure and the second fin-shaped structure formed thereon, and forming the supporting portion by patterning the film material to physically connect a surface of the first fin-shaped structure to a surface of the second fin-shaped structure.
26 . The method according to claim 17 , wherein forming a supporting portion comprises: forming a film material on the substrate with the first fin-shaped structure and the second fin-shaped structure formed thereon, and forming the supporting portion by patterning the film material to extend from a surface of the substrate to a surface of the first fin-shaped structure to physically connect the first fin-shaped structure to the substrate.
27 . The method according to claim 26 , wherein forming a film material and patterning the film material comprises: forming the film material to cover the first fin-shaped structure, the second fin-shaped structure and the surface of the substrate, and forming a mask to shield a portion of the film material, wherein the mask extends on the first fin-shaped structure and the second fin-shaped structure beyond an extent of the first fin-shaped structure and the second fin-shaped structure in a direction perpendicular to the longitudinal extending direction of the first fin-shaped structure and the second fin-shaped structure, and the mask covers only a fraction of a length of the first fin-shaped structure and the second fin-shaped structure in the longitudinal extending direction of the first fin-shaped structure and the second fin-shaped structure; selectively removing a portion of the film material which is not shielded; and removing the mask.
28 . The method according to claim 27 , wherein the method further comprises: after removing the mask, selectively removing an upper end of the supporting portion to expose a top surface and a part of sidewalls of the first fin-shaped structure.
29 . The method according to claim 27 , wherein forming the mask comprises: covering opposite ends of the first fin-shaped structure and the second fin-shaped structure with the mask.
30 . The method according to claim 27 , wherein forming the film material comprises: depositing an oxide layer and a nitride layer in sequence in a substantially conformal way.
31 . The method according to claim 22 , where forming the insolation layer comprises: forming an oxide layer on the substrate; and etching the oxide layer back, so that the isolation layer has a portion under the second semiconductor layer, which is contiguous to the second semiconductor layer, and has remaining portions whose top surface is closer to the substrate than a bottom surface of the second semiconductor layer facing the substrate.
32 . The method according to claim 31 , wherein when the oxide layer is etched back, an undercut is formed under the second semiconductor layer.
33 . The method according to claim 22 , further comprising: forming, on the isolation layer, a dielectric layer extending in a direction intersecting the longitudinal extending direction of the first semiconductor layer, wherein the dielectric layer divides the first semiconductor layer into a first portion and a second portion, and divides the second semiconductor layer into a first portion and a second portion, wherein the gate stack comprises a first gate stack intersecting the first portion of the second semiconductor layer and a second gate stack intersecting the second portion of the second semiconductor layer.
34 . An electronic device, comprising an integrated circuit comprising the semiconductor device according to claim 1 .
35 . The electronic device according to claim 34 , further comprising a display operatively coupled to the integrated circuit and a wireless transceiver operatively coupled to the integrated circuit.
36 . The semiconductor device according to claim 6 , further comprising: a dielectric layer extending in a direction intersecting the longitudinal extending direction of the first semiconductor layer, wherein the dielectric layer isolates the first portion of the first semiconductor layer from the second portion of the first semiconductor layer and isolates the first portion of the second semiconductor layer from the second portion of the second semiconductor layer.
