The narrow-band band-stop filters are often used in microwave systems to suppress the nonlinear harmonic output of high-power transmitters and the parasitic passband of band-pass filters. The difficulty of the design is to eliminate the parasitic stopband at three times the center frequency f0. This paper effectively solved the problem of parasitic stopband at 3f0 and largely extended the upper passband by means of loading a lumped capacity at the open end of the parallel-coupled line. According to this method, a narrow band-stop filter with a center frequency at 5.3 GHz has been presented. The test result shows that this filter has a good performance at upper passband.

A digital filter in high—precision∑—△A/D converter for audio applications was designed.The filter is composed of a cascaded—integrator—comb(CIC) filter,a compensation filter and a halfband filter.Time division multiplex technology is used for multipliers to reduce circuit area.The filter supports 128 or 64—time decimation and its performance can satisfy the requirement of the∑—△A/D converter.

Charge sharing phenomenon due to load capacitance’s memory effect in switched - capacitor sample - and- hold(S/H) circuit is modeled ,which gives it may cause the opamp settling amplitude increasing .According to the total equation derived from the settling behavior of opamp ,the increased amplitude may further cause more power , larger bandwidth or lower speed .For improving this phenomenon ,an optimizing methodology is proposed based on pre - discharge theory and double sampling technology ,which can eliminate the extra requirement of power and bandwidth without reducing the initial speed of S /H circuit .A 12bit ,100Msps double S/H circuit achieved by simulation proves the availability of this method .

A 12bit 100 MSPS pipelined analog—to digital converter(ADC) sample and hold circuit is designed based 0.13μm/3.3V CMOS process.In this circuit,a high linearity Double Side Symmetrical No Feed Through (DSSNFT) bootstrapped switch,a high gain wide bandwidth Cascode Transconductance Feed Forward(CTFF) compensation two—stage fully differential OTA and a low gain—error correlated double sampling S/H topology structure are used to build S/H circuit.The simulation results show that SFDR can reach 86.4dB with input signal 11.27MHz and sample signal 111MHz.Power consumption is about 32mW at a 3.3V supply.

This paper established a target thread model based on the factors of space situation and air combat capacity of targets,such as altitude,distance,speed and angle,and proposed a target threat level assessment method based on PSO(particle swarm optimization) and BP(back-propagation) algorithm to estimate the threat level of aerial targets.Through predicting threat level of 8 aerial targets,the result shows that this method is effective to solve the problem of air threat assessment target,greatly improving the objectivity of decision-making.

"VXI总线测试软件平台"是一个大型系统软件,必须对其完备地测试,以保证软件系统的可靠性.针对"VXI总线测试软件平台"的特性,就软件测试、软件的可维护性及可靠性进行了论述.