In order to realize on-line recognizing jointing-defection of pins on IC chip for the PCB image,a method of image locating,segmentation and detecting defection based on frequency field is presented.The theoretical analysis and the comparison experiment show that the proposed method is robust,which has a high recognizing rate and low mis-detecting rate.
为实现运动图像的实时压解传输,在优化3D-DCT算法的基础上,采用8×8bit乘加并行、系数转换、矩阵转置、数据装载和截位的解决方式,构造了一个64位并行的三维DCT硬件核,使得运动图像的压解运算中DCT运算的CPU耗时下降了十几倍,实现了实时压缩.
为实现运动图像的实时压解传输,在优化二维DCT算法的基础上,采用流水线型自分块结构以及系数转换、矩阵转置、数据装载和截位的通盘解决方式,构造了一个流水线型自分块的二维DCT硬件核,以实现运动图像的实时压缩.
This paper proposes a new algorithm on motion pictu re compression and decompression using Three-dimensional Discrete Cosine Transfor m. The algorithm not only emphasizes reducing computation but also helpful with hardware implementation. Based on this approach, an 80 bit-parallelled 3D-DC T hardware is developed, which uses parallel multiplication to accelerate comput ation ,three-dimensinal transposition memory to remove the time consumption of transposition operation and temporary register to reduce the time of accessing i ntermediate values. FPGA simulations show that real time video 3D-DCT compressi on can be completed by using the hardware core.
为实现运动图像的实时压解传输,采用8位乘加并行、系数转换、矩阵转置和数据装载和截位的通盘解决方式,构造了一个64位并行二维离散余弦变换(discrete cosine translation,DCT)硬件核,使得运动图像的压解运算中DCT和运动估值的CPU耗时下降了十几倍,实现了实时压缩.
介绍了一种用VHDL设计USB2.0功能控制器的方法,详述了其原理和设计思想,并在FPGA上予以实现.
在优化3D-DCT算法的基础上,采用流水线型结构,系数转换、矩阵转置、数据装载和截位的通盘解决方式,构造一个流水线型的三维DCT硬件核,使运动图像的压解中DCT运算的CPU耗时下降十几倍,实现实时压缩.
