Application of heat-conducting coatings for cooling of high-power FETs based on heterostructures with arsenide–gallium substrate is theoretically analyzed. When the basic technology for manufacturing of transistors is employed in the absence of additional efforts aimed at a decrease in the thermal resistance of the substrate, the application of an additional thermal interface that represents a heat-conducting dielectric coating makes it possible to substantially decrease the overheating of the transistor channel. A several-fold decrease in such overheating can be reached using variations in the thickness of the coating and modification of the transistor structure and working regimes.

AbstractApplication of heat-conducting coatings for cooling of high-power FETs based on heterostructures with arsenide–gallium substrate is theoretically analyzed. When the basic technology for manufacturing of transistors is employed in the absence of additional efforts aimed at a decrease in the thermal resistance of the substrate, the application of an additional thermal interface that represents a heat-conducting dielectric coating makes it possible to substantially decrease the overheating of the transistor channel. A several-fold decrease in such overheating can be reached using variations in the thickness of the coating and modification of the transistor structure and working regimes.

X-band amplifier with output power of 14-15 W, efficiency more than 25% and gain more 14 dB is developed. Testing results are presented.

The simple correction method is presented for the non-linear models of power FET's to be adjusted by means of measurements of transistors in a test board. The technique is based on measurement of the same transistor in 50 Ohm line and then in matching networks with known impedance realizing maximum gain factor at the operating point, and in a test circuitry adjusted for the maximum of output capacity.

The correction data connected with boundary effects in high dielectric constant matching networks of fabrication peculiarities has been obtained. It is shown that fabrication peculiarities can shift amplifier working frequency about 1.5 GHz and three times decrease working frequency band.

The intra-matched transistor of 3 cm wavelength with output power higher than 10 W, associated gain higher than 13 dB and efficiency more than 30 % has been developed. The transistor is designed for continuous and pulse operation. Experimental results for 30 intra-coupled transistors are demonstrated.

The simple method of error reduction of contacting in the process of regenerating of analog circuits of power FETs is presented. The technique is based on the measuring operation of the same transistor in 50 Ohm line and than in the matching circuit with the specified impedance.

High power hermetically sealed, internally matched transistor for 3 cm wave length band applications with output power higher than 10 W, and associated gain higher than 13 dB, and efficiency higher than 30 % has been developed. Transistor is designed for continuous and pulse operation. Experimental results for 30 internally matched transistors are demonstrated.

Stability problems for X-band internally matched HEMTpsilas with output power higher than 10 W, associated gain higher than 13 dB are discussed. Several variants of schematic design for parasitic generation elimination are proposed.

X-band pre-and output amplifiers for phased array has been designed and fabricated. The power gain of preamplifier is greater than 20 dB; output power is greater than 1 Watt. Output amplifier show 8...10 dB power gain and output power 8... 10 Watt. The theoretical and practical characteristics are presented. Design considerations for power amplifiers are discussed.

Nonlinear models had been developed for a submicrometer gate with pHEMT's developed in R&PC "Istok" and 8 W output power in 3-cm wavelength band. It is shown that this model provided satisfactory agreement between calculated and experimental data.

In this paper the design of three-way travelling-wave divider/combiner is presented. The scheme proposed allows combining power microwave FETs. Combined circuits' topologies are shown with various substrates. Divider and combiner have been designed on 0.5 mm-thick alumina substrates. Input and output transmission lines have been used as matching capacitors and have been designed on 0.3 mm-thick substrates with epsiv=80. GaAs MESFET consists of 8 partial transistors with gate dimensions of 1680 mumtimes.25 mum. Theoretical performance specifications of the scheme are as follows: output power>16 W, gain factor>6.5 dB, input VSWR 1.1-1.6, output VSWR 1.8-2.0

In this paper are the results of simulation of matching networks for power MESFET's are presented. The technique of modeling is based on substitution of coupled microstrip by equivalent single microstrip placed inside magnet field webs. The designated power MESFET has L-C-L type matching networks. The lumped capacitors were realized as parallel plate capacitors on 0.3 mm thick ceramic substrates, which have high dielectric constant. The inductors were approximated by bond wires. The distance between microstrip lines on ceramics is equal 40 microns that causes the strong coupling between them. Modeling of scheme with coupling lines has hard mathematic problems. This problem is solved by replacement of the coupled lines by the equivalent single lines. The wave impedance and slowness factor have been defined for a single micro-strip line located between magnetic walls. This approach allows us to take into account a coupling of microstrip lines at designing a matching networks of power transistor

High power pulse solid-state hybrid amplifier has been developed for two centimeter wavelength band. Applied at module design have been all HF components of R&PC "lstok". Amplifiers show 38divide40 dB gain and output power 9divide11 W at modulation time tau=15 mus and relative pulse duration Q=10. Amplitude and phase noise is less than -135 dB/Hz and -120 dB/Hz accordingly at 5 kHz frequency shift. Gain nonuniformity is less than 0.3 dB within 100 MHz band

For the submicrometer gate field effect transistor developed in R&PC lstok yielding 5 W output power in two and three centimeter wave length band, comparison of different nonlinear models, which are common for main system of MIS design has been carried out. It is found that being properly corrected, all models provided satisfactory agreement between calculated and experimental data in spite of apparent limitations peculiar to the models.

Typical depths and rechargeable times for deep levels in low noise field effect transistors under the power pulse depending on f transistor parameters, pulse amplitude, electron capture cross-section have been estimated. Based on this estimations and experimental date, including measured noise figure and associated gain of typical transistors, the parasitical buffer layer conductance effect on performance of low noise amplifier with bipolar power supply and unipolar power supply has been analyzed. It is shown that noise figure of amplifier under power pulse can be increased twice for bipolar power supply and tree times for unipolar power supply

For the submicrometer gate field effect transistor developed in R&PC "lstok" yielding 5 W output power in two and three centimeter wave length band, comparison of different nonlinear models, which are common for main system of MIS design has been carried out. It is found that being properly corrected, all models provided satisfactory agreement between calculated and experimental data in spite of apparent limitations peculiar to the models