针对双机器人基坐标系标定过程复杂、定位精度不高,提出一种基于"三点定圆"的改进双机器人基坐标系标定方法.通过分析误差原理以及引入高斯白噪声误差,结合理论分析和软件仿真设计实验.结果表明改进后的双机器人基坐标系标定方法具有准确性和稳定性,保持了良好的定位精度.

针对传统的局部二值模式(LBP)算法在提取表情图像特征时会遗漏掉某些关键的局部信息这一特点,提出了一种改进的LBP算法用于表情识别.首先在传统的LBP算子的基础上用中心像素与邻域像素灰度值做差值运算取其绝对值,并将每个绝对值相加再计算平均值然后把平均值作为阈值记为M,该阈值作为以后LBP编码时的参数.为了获得更多有效的特征信息,决定对表情图像的每个区域进行顺时针和逆时针两次编码,得到不同的两个特征直方图,再进行整合.最后采用支持向量机(SVM)进行分类识别.在JAFFE数据库和CK+数据库上实验所获得的结果表明,所采用的方法优于传统的LBP算法.

In order to solve the IRIG-B(AC)decoding low accuracy problems and improve the stability of the demod?ulation system,a high-performance decoder is presented useing FPGA implementation demodulation IRIG-B(AC) codes.By calling the FPGA IP core generation multipliers and FIR low-pass filter,the AC components in the B(AC) code are filtered,then demodulated according to their amplitude.The decoder can demodulate time information of IRIG-B(AC)code accurately,transmit it quickly,and outputs the second pulse which is corresponding with time in?formation,through the output port to the demodulated PC display. Through extensive testing the decoder shows its accuracy,stability,and meets the requirements of various applications for IRIG-B(AC)code of timing.

To solve the problems of high false alarm rate, low sensitivity and unable to locate intrusion targets and other issues in ordinary pyroelectric infrared detection technology, the design based on compound eye structure is proposed for pyroelectric infrared detector. Combining the advantages of pyroelectric infrared detection, including good concealment, stable performance, environmental adaptability, large viewing angle of compound eye, small size and high sensitivity, the charge signal on pyroelectric material is converted into voltage signal, and output after filtering and amplifying. Experiments show that the monocular of the designed pyroelectric infrared detector can detect intrusion target within fifteen meters, and output pulse level as an alarm signal.

According to signal function of dedicated DDS(Direct Digital Frequency Synthesizer)chip,a design scheme of DDS signal generator based on FPGA(Field Programmable Gate Array)is introduced. Using Xilinx ISE to design core part of the system,the digitally controlled oscillator,in which the waveform memory is implemented by calling the IP core. And this method is very convenient and IP core is high integration. It shows that DDS signal generator based on FPGA has a stability,high resolution and fast conversion speed,and can generate all kinds of signal according to functional modules simulation and complete circuit test. Since FPGA implements the soft-core processor,DDS can easily be modified and optimized with unparalleled flexibility.

针对精密授时系统中,铷原子钟只提供单一的10 MHz高精度信号,而用FPGA等数字分频设计精度达不到要求的问题,设计了采用电阻、电容、电感与运算放大器等简单器件构成的高精度模拟分频电路.对高精度分频电路中各个模块的设计进行了详细的描述.通过测试,设计的一分频与二分频电路都能够使精度达到±5×10-11,这比一般的数字分频器要高几个数量级.

为解决传统解码仪存在的体积大、兼容性差等问题,提出利用FPGA实现解调IRIG-B(DC)码信息的电路板卡的设计,该板卡能够解调出IRIG-B(DC)码的时间信息,根据此时间信息,解码卡可以输出相应的秒脉冲,并且通过RS232串口将解调出的时间信息传送给上位机;试验证明该解码卡具有环境适应性强、体积小、结构简明、应用范围广等特点,可以满足实际应用场所对IRIG-B码解码的要求。

精确的时间间隔测量在时间同步系统有着至关重要的作用,为了满足大量程和高精度的需求,介绍了一种直接计数法和时间-数字装换法相结合的时间间隔测量系统;设计中采用两片TDC-GP2时间-数字转换芯片,结合FPGA和上位机,可以实现精度为1ns时差测量;经过大量的实际测量,系统的分辨率为70ps,精度为1ns,最大可以测量1s的时间间隔;该设计的系统具有可靠性高、功耗低、精度高、使用灵活等优点。