In this paper we propose an approach to use of SDN for real-time data transfer in onboard networks. This approach implements virtual links technology similar to the one used in existing AFDX and Fibre Channel onboard networks, while significantly improving run-time network reconfigurability. This improvement increases onboard system flexibility, allowing support for dynamic composition of system operation modes and seamless mode change. The approach was implemented as a functional prototype and experimentally evaluated in a virtual SDN network environment.

In this paper, we consider a schedulability analysis problem for real-time modular computer systems (RT MCS). A system configuration is called schedulable if all the jobs finish within their deadlines. The authors propose a stopwatch automata-based general model of RT MCS operation. A model instance for a given RT MCS configuration is a network of stopwatch automata (NSA) and it can be built automatically using the general model. A system operation trace, which is necessary for checking the schedulability criterion, can be obtained from the corresponding NSA trace. The paper substantiates the correctness of the proposed approach. A set of correctness requirements to models of system components and to the whole system model were derived from RT MCS specifications. The authors proved that if all models of system components satisfy the corresponding requirements, the whole system model built according to the proposed approach satisfies its correctness requirements and is deterministic (i.e. for a given configuration a trace generated by the corresponding model run is uniquely determined). The model determinism implies that any model run can be used for schedulability analysis. This fact is crucial for the approach efficiency, as the number of possiblemodel runs grows exponentially with the number of jobs in a system. Correctness requirements to models of system components models can be checked automatically by a verifier using observer automata approach. The authors proved by using UPPAAL verifier that all the developed models of system components satisfy the corresponding requirements. User-defined models of system components can be also used for system modeling if they satisfy the requirements.

This paper presents a comparison of several approaches to design of data exchange networks for onboard real-time information and control systems (RT ICS). The approaches considered are based on Fibre Channel (FC), Avionics Full Duplex Ethernet (AFDX) and Software-Defined Networking (SDN) technologies. The networks are compared according to the following criteria: ability to guarantee real-time messages transfer; ability to maintain common time in the system; amount of extra hardware resources to ensure the necessary reliability; support for dynamic (during the RT ICS runtime) alteration of message transfer routes.

In this paper, the reliability allocation problem (RAP) for real-time avionics systems (RTAS) is considered. The proposed method for solving this problem consists of two steps: (i) creation of an RTAS simulation model at the necessary level of abstraction and (ii) application of metaheuristic algorithm to find an optimal solution (i. e., to choose an optimal set of fault tolerance techniques). When during the algorithm execution it is necessary to measure the execution time of some software components, the simulation modeling is applied. The procedure of simulation modeling also consists of the following steps: automatic construction of simulation model of the RTAS configuration and running this model in a simulation environment to measure the required time. This method was implemented as an experimental software tool. The tool works in cooperation with DYANA simulation environment. The results of experiments with the implemented method are presented. Finally, future plans for development of the presented method and tool are briefly described.

Significant part of requirements to avionics software can only be tested on target hardware running non-instrumented software. General purpose functional testing toolsets require loading auxiliary software to target avionics devices to perform target-based testing. This work presents a toolset for functional testing of avionics software, aimed at testing without target instrumentation. The toolset supports automatic and human-assisted testing of software running on target avionics device(s) by providing input data through a variety of onboard interface channels and analyzing devices' responses and inter-device communication. Architecture of software and hardware counterparts of the toolset is described. A family of avionics testbenches based on the toolset is considered as an industrial case study. Special attention is paid to toolset application for testing of dependability requirements to avionics systems.

In this paper, the problem of automatic scheduling of data exchange over a channel with centralized control in real-time avionics (RTA) systems is addressed. Examples of such channels are MIL STD-1553B multiplex data bus and Fibre Channel FC-AE-1553. Scheduling algorithms implementing greedy strategy and ant colony method are presented and evaluated experimentally. These algorithms support customization for specific requirements of the target onboard RTA system. Results of experimental evaluation demonstrate that the ant colony algorithm outperforms greedy algorithms on most of the considered classes of input data, with realistic technological requirements to data exchange. The proposed technology for data exchange scheduling is implemented in a tool system. Two case studies of industrial application of the system to the development of onboard real-time systems are described.

In this paper we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the loop simulation. The environment to support this technology is described. This environment also enables simulation-based evaluation of RTES architecture on early stages of RTES development.

In this paper we address the problem of automatic generation of a data exchange schedule for the MIL STD-1553B multiplex data bus. This bus is widely used in modern real-time distributed embedded systems. Static scheduling strategy is typically used to build a schedule of data exchanges over this bus. We present heuristic algorithms developed to perform the scheduling with optimization of bus load and number of scheduled exchange commands. During the integration phase of the embedded system development, it is often the case that a correct data exchange schedule cannot be constructed due to excessive requirements to communication through the bus. We present algorithms for generation of suggestions on how to change the requirements within given ranges in order to make the schedule construction possible. A tool system for automatic generation of data exchange schedules is also presented, with its structure and key features

A methodology and tools for estimating the execution time of applications written in a high-level language are studied. Optimization for a particular processor is taken into account. The methodology makes it possible to obtain estimates with a controlable error. The results of applying the methodology to a DSP96002 processor for digital signal processing are presented.