Over the last 30 years, SiC materials growth has developed into a mature industry with multiple manufacturers of high-quality wafers who have supplied millions of wafers to the market. This industry has also increased the diameter of these wafers from 25 mm up to as large as 200 mm representing an almost two order of magnitude increase in surface area available for device manufactured on each wafer. Simultaneously, these manufacturers have increased the wafer quality to enable the creation of large power devices of 1 cm 2 area and above. It is expected that over the next decade, SiC will blossom into a very significant industry, with many commercial players and significant impact on future technology.

We demonstrate the growth, by MBE, of high sheet density B delta layers in both Si and SiGe epitaxial layers. Double Crystal X-Ray Diffraction is shown to be a non-destructive method of characterising the width of very narrow (0.3 nm) delta layers and the sheet density of the activated B. The ability of delta layers to withstand high temperature anneals is considered and it is found that a 750 °C anneal for 1 hour broadens the delta layer to beyond the width required for carrier confinement.

In this paper we address the problem of producing SiGe buffer layers of acceptable quality for the growth of symmetrically strained SiGe structures. Initially we consider SiGe layers grown to well beyond the metastable critical thickness and examine the degree of residual strain both as - grown and post anneal. The defect levels in metastable SiGe layers following high temperature anneal were also studied. A buffer layer was grown consisting of stacked metastable SiGe layers each of which is annealed in situ prior to the growth of the next layer and terminating with a 0.45 SiGe alloy. This produces nearly fully relaxed 1.15pim thick structures with threading dislocation densities of 4 × 106cm−2. Limited area growth on Si suggests that elastically relaxed material free of both threading and misfit dislocations can be produced.

A dedicated, grower-friendly MBE computer control system is described, and its performance in demonstrated in growth of high resolution doped SiGe structures.

In this work, aggregate epitaxial carrot distributions are observed at the crystal, wafer and dislocation defect levels, instead of individual extended carrot defect level. From combining large volumes of data, carrots are observed when both threading screw dislocations (TSD) and basal plane dislocations (BPD) densities are locally high as seen in full wafer maps. Dislocation density distributions in areas of carrot formation are shown, and suggest TSD limit the formation of carrots in regions containing BPD. These data also add support for mechanisms requiring the need for both dissociated BPD and TSD for carrot formation.

The growth of large diameter silicon carbide (SiC) crystals produced by the physical vapor transport (PVT) method is outlined. Methods to increase the crystal diameters, and to turn these large diameter crystals into substrates that are ready for the epitaxial growth of SiC or other non homogeneous epitaxial layers are discussed. We review the present status of 150 mm and 200 mm substrate quality at Cree, Inc. in terms of crystallinity, dislocation density as well as the final substrate surface quality.

Definitive correlations are presented between specific types of dislocations identified via Synchrotron White Beam X-Ray Topography (SWBXRT) and identified via selective etching of 4H-SiC substrates. A variety of etch conditions and the results on different faces of SiC substrates and epiwafers are examined. Hillocks formed on the carbon face of the substrate after KOH etching correlate very well to TSDs identified via SWBXRT. Topography of substrates and of vertical crystal slices reveals a large proportion of Threading Mixed character Dislocations (TMDs) in the population of Threading Screw Dislocations.

Latest results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Increased growth rates of 30-40 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. Increased quantities of 150-mm epitaxial wafers now allow statistical analysis of their epitaxial layer properties. Specular epitaxial layer morphology was obtained, with morphological defect densities <0.4 cm-2, consistent with projected 5x5 mm die yields averaging 93% for Si-face epitaxial layers between 10 and 30 microns thick. Intrawafer thickness and doping uniformity are good, averaging 1.7% and 5.1% respectively. Wafer-to-wafer doping variation has also been significantly reduced from ~12 [5] to <3% s/mean. Initial results for C-face growths show excellent morphology (97%) but poor doping uniformity (~16%). Wafer shape is relatively unchanged by epitaxial growth consistent with good epitaxial temperature uniformity.

We discuss continuing materials technology improvements that have transformed silicon carbide from an intriguing laboratory material into a premier manufacturable semiconductor technology. This advancement is demonstrated by reduced micropipe densities as low as 0.22 cm −2 on 3-in.-diameter conductive wafers and 16 cm −2 on 100-mm-diameter conductive wafers. For high-purity semi-insulating materials, we confirm that the carbon vacancy is the dominant deep-level trapping state, and we report very consistent cross-wafer activation energies derived from temperature-dependent resistivity.Warm-wall and hot-wall SiC epitaxy platforms are discussed in terms of capability and applications. Specific procedures that essentially eliminate forward-voltage drift in bipolar SiC devices are presented in detail.

The development of SiC bulk and epitaxial materials is reviewed with an emphasis on epitaxial growth using high-throughput, multi-wafer, vapor phase epitaxial (VPE) warm-wall planetary reactors. It will be shown how the recent emergence of low-cost high-quality 100-mm diameter epitaxial SiC wafers is enabling the economical production of advanced wide-bandgap Power–Switching devices.

DC characteristics and reverse recovery performance of 4H-SiC Junction Barrier Schottky (JBS) diodes capable of blocking in excess of 10 kV with forward conduction of 20 A at a forward voltage of less than 4 V are described. Performance comparisons are made to a similarly rated 10 kV 4H-SiC PiN diode. The JBS diodes show a significant improvement in reverse recovery stored charge as compared to PiN diodes, showing half of the stored charge at 25°C and a quarter of the stored charge at 125°C when switched to 3 kV blocking. These large area JBS diodes were also employed to demonstrate the tremendous advances that have recently been made in 4H-SiC substrate quality.