With time-to-market getting the most important issue in system design, reusing the design experiences as well as the IP cores is becoming very critical. Design patterns, intended for simplifying the reuse process, are design experiences that worked well in the past and documented to be reused in the future. In this paper, a design pattern named NnEP (Neural-network-based Embedded systems design Pattern) is introduced for employing neural networks, common bio-inspired solutions, in SoC-based embedded systems. This pattern is based on NnSP IP suite, a stream processing core and its tool chain, NnSP Builder and Stream Compiler. NnEP is introduced for enhancing and automating reuse in design of intelligent SoC's requiring high-speed parallel computations specially those based on neural networks. The NnEP pattern consists of the semi-automated steps, extracted from design experiences, a designer takes using the provided software suite to realize a NN application in an intelligent SoC. This includes the application analysis and pre-processing procedure, building the best-match IP core with the application, and finally compiling the intended NN application on the target IP core. On the other hand, ASIC 0.18 mum implementation results of NnSP soft core show that the core can achieve the speed of 51.2 GOPS, 25.6 GMAC/s. This throughput is comparable with the existing parallel solutions and higher in an order of magnitude from common general-purpose-processor-based solutions. This high throughput in conjunction with the inherent reusable architecture of NnSP, makes NnEP a powerful design pattern for cutting-edge neural-network-based embedded applications such as pattern recognition which is elaborated as a case study in the proposed design pattern.

Particle Swarm Optimization (PSO) is an evolutionary computation method which has successfully been used in many engineering optimization problems. The major obstacle limiting the use of PSO in real-time applications is its long execution time. Hardware implementation of evolutionary algorithms has been employed to alleviate the high computational cost of complex optimization problems. In this paper, we propose a parallel scalable architecture which is well-suited for hardware implementation of PSO. The architecture is composed of a number of Processing Elements (PE) performing the algorithm computations that are connected to other PEs through communication channels. PEs are arranged based on the mesh architecture which provides either scalability or performance to execute computational intensive applications. Two communication methods are proposed based on the architecture which enable the system to solve different kinds of problems.

DCim++ is a C++ library developed for object oriented hardware design, modeling and distributed simulation. DCim++ enables C++ to be used as an OO HDL, which supports concurrency in description, inheritance in design and distributedness in simulation. Design simulation results are obtained by running C++ programs on a network of workstations. The message passing interface (MPI) library has been used in the implementation of DCim++ as the basis of communications required for distributed simulation. In our simulation scheme, we have not considered any central management unit in order to defy performance degradation, instead only a coarse-grain synchronizer is used to keep the distributed components synchronized. This paper explores the structure of the DCim++ library and its mechanisms. The process a designer has to go through in order to design a system using DCim++ and conduct its distributed simulation leaving communication complications to DCim++, has also been presented. Finally, the results of our uniprocessor and distributed simulations for ISCAS benchmark circuits show high degrees of performance gains

Cooperation in learning improves the speed of convergence and the quality of learning. Special treatment is needed when heterogeneous agents cooperate in learning. It has been discussed that, cooperation in learning may cause the learning process not to converge if heterogeneity is not handled properly. In this paper, it is assumed that two (or several) heterogeneous Q-learning agents cooperate to learn. The two hunter agents independently pursue a prey agent on a two-dimensional lattice: however, the hunters' visual-field depths are different. Thus, in order to have successful cooperation, the agents should be able to interpret other agents' Q-table. For this purpose, an algorithm has been proposed and implemented on the pursuit problem. Two case studies has been introduced and simulated to show the effectiveness of the proposed algorithm.

Parallel algorithms and specifically parallelism in sorting algorithms as a symbolic application have been in- tensively studied. Some algorithms are available for parallel sorting by dedicated or homogenous processors. Dedicated processors for sorting are rarely a practice of real world. This paper introduces an algorithm for parallel sorting on proces- sors that are not only utilized for sorting but also may run a multitasking OS and perform other tasks concurrently. This multitasking leads to stochastic behaviors and virtual speeds of the processors felt by the processes including the sorter pro- cesses. An agent framework is used to simulate a multiprocessor environment. The results show that the proposed algorithm performs better load balancing between processors than previous algorithms in stochastic speed-variant environments.

Fault is inevitable especially in MASS (multi-agent system) because of their distributed nature. This paper introduces a new approach for fault tolerance using help provision and emotional decision-making. Tasks that are split into criticality-assigned real-time subtasks according to their precedence graph are distributed among specialized agents with different skills. If a fault occurs for an agent in a way that it cannot continue its task, the agent requests help from the others with the same skill to redo or continue its task. Requested agents would help the faulty agent based on their nervousness on their own tasks compared to his task. It Is also possible for an agent to discover death of another agent, which has accepted one of his tasks, by polling. An implementation using JADE platform is presented in this paper and the results are reported.

Cim++ is a C++ library that is developed for object oriented hardware design and modeling. Cim++ enables C++ to be used as an OO HDL, which supports concurrency in description and inheritance in design, while design simulation results are obtained by running the C++ program. On the other hand, Cim++ provides an integrated design and modeling environment for hardware/software co-design while supporting object oriented design aspects in both worlds. In this paper the motivation for developing Cim++ will be discussed, and the ideas behind it will be explored. The structure of the Cim++ library and the approach a designer must take to use it as a framework for implementing real hardware in an object oriented manner will be presented. Finally, implementation examples are included to prove its suitability for object oriented hardware design life cycle support.