Tackling issues of implantation-caused defects and contamination, this paper presents a new complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) pixel design concept based on a native epitaxial layer for photon detection, charge storage, and charge transfer to the sensing node. To prove this concept, a backside illumination (BSI), p-type, 2-µm-pitch pixel was designed. It integrates a vertical pinned photo gate (PPG), a buried vertical transfer gate (TG), sidewall capacitive deep trench isolation (CDTI), and backside oxide-nitride-oxide (ONO) stack. The designed pixel was fabricated with variations of key parameters for optimization. Testing results showed the following achievements: 13,000 h+ full-well capacity with no lag for charge transfer, 80% quantum efficiency (QE) at 550-nm wavelength, 5 h+/s dark current at 60 °C, 2 h+ temporal noise floor, and 75 dB dynamic range. In comparison with conventional pixel design, the proposed concept could improve CIS performance.

This paper describes a new BSI image sensor pixel using an advanced PhotoMOS structure designed with capacitive deep trench pixel-to-pixel isolation. This PhotoMOS technology is a smart alternative to the conventional implanted pinned photodiode and providing an image quality gain. Indeed the photo-gate device fabrication takes benefit from the full-depth front process MOS trench etched through a fully optimized silicon epitaxial layer and dedicated to photon absorption, signal charges collection and storage zone avoiding any implanted doping species. On top of the photo Gate device, a planar read-out transistors and a vertical transfer gate is proposed.