A GaAs n-i-p-i doping solar cell with ion implanted selective contacts is grown, fabricated and investigated by spectral response and AM1.5G current-voltage (I-V) measurements. The device, whose active region consists of 4 layers of horizontal doping alternating n-p-n-p, is grown by molecular beam epitaxy (MBE). Electrical connection to layers in the middle of the device is achieved by creating vertical layers of p(+) and n(+) type doping by ion implantation of Mg and Si, respectively. The implants are 10 mu m wide and spaced 100 mu m apart. By carefully selecting the energies of the ions, the implants are kept away from the surface of the device, so that standard front/back contacts to be used. Spectral response measurements suggest that all layers of the device contribute to the photocurrent effectively. The device achieves J(sc) = 12.9 mA/cm(2) and V-oc = 0.189 V for the AM1.5G 1 sun solar spectrum. (C) 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

We present experimental results on shallow junction formation in germanium by phosphorus ion implantation and standard rapid thermal processing. An attempt is made to improve phosphorus activation by implanting phosphorus at high and low temperature. The focus is on studying the germanium damage and phosphorus activation as a function of implant temperature. Rutherford backscattering spectrometry with channelling and Hall Effect measurements are employed for characterisation of germanium damage and phosphorus activation, respectively. High and low temperature implants were found to be better compared to room temperature implant.

G. G. Scapellato,1 S. Boninelli,1 E. Napolitani,2 E. Bruno,1 A. J. Smith,3 S. Mirabella,1 M. Mastromatteo,2 D. De Salvador,2 R. Gwilliam,3 C. Spinella,4 A. Carnera,2 and F. Priolo1 1MATIS IMM-CNR and Dipartimento di Fisica e Astronomia, Universita di Catania, via S. Sofia 64, 95123 Catania, Italy 2MATIS IMM-CNR and Dipartimento di Fisica, Universita di Padova, via Marzolo 8, 35131 Padova, Italy 3Ion Beam Centre, The University of Surrey, Guildford, Surrey, GU2 7XH, United Kingdom 4IMM-CNR, Ottava strada 5, 95121 Catania, Italy (Received 1 June 2011; published 5 July 2011)

B diffusion in crystalline Ge is investigated under equilibrium and non-equilibrium conditions in a large temperature range (200–800°C), in order to discriminate the role of self-interstitials (Is) and the energy barriers involved in the microscopic mechanism of B migration. To this aim, we copiously furnished Is by 200 or 300keV H+ irradiation, and performed a direct comparison with B diffusion in thermal conditions at the same temperature (T). The diffused profiles of B were simulated assuming the kick-out model, and the extracted parameters (migration length, λ, and formation rate of mobile B, g) indicated that the B diffusion is always mediated by Is showing different features at low and high T regimes. For T lower than 600°C the thermal generation of Is is negligible and the only barrier to g (measured to be ∼0.1eV) is due to the Is migration and B mobile formation. At T higher than 600°C, the thermal generation of Is starts to overcome the Is supply from the irradiation, and the activation energy of g increases to 3.0–3.5eV. The migration length in the low-T regime has the largest value (∼20nm), while it decreases down to 1–2nm by increasing T, showing a negative activation energy of ∼−0.64eV, compatible with a dissociation process which stops the diffusion event. In this regard, we observed that the mobile B migration length depends only on T, regardless of the point defects concentration. These results and the energy barriers measurements contribute to a further comprehension of the B diffusion and point defects in crystalline Ge.

The concentration of vacancy-type defects in a silicon-on-insulator substrate consisting of a 110 nm silicon overlayer and a 200 nm buried oxide has been quantified using variable energy positron annihilation spectroscopy following 300 keV Si+ ion implantation to a dose of 1.5×1015 cm−2 and subsequent annealing at temperatures ranging from 300 to 700 °C. The preferential creation of vacancies (relative to interstitials) in the silicon overlayer leads to a net vacancy-type defect concentration after annealing. Assuming that the defects have a structure close to that of the divacancy we determine the concentration to range from 1.7×1019 to 5×1018 cm−3 for annealing temperatures ranging from 300 to 700 °C. The measured defect concentration is in excellent agreement with that predicted via Monte Carlo simulation. The impact of this net vacancy population on the diffusion and activation of phosphorus introduced by a 2 keV implantation to a dose of 1×1015 cm−2 has been observed. For samples that combine both Si+ and P+ implantations, postimplantation phosphorus diffusion is markedly decreased relative to that for P+ implantation only. Further, a fourfold increase in the electrical activation of phosphorus after postimplantation annealing at 750 °C is observed when both implantations of Si+ and P+ are performed. We ascribe this affect to the reduction in phosphorus-interstitial clusters by the excess vacancy concentration beyond the amorphous/crystalline interface created by the P+ implantation.

Silicon Photonics is a field that has seen rapid growth and dramatic changes in the past 5 years. According to the MIT Communications Technology Roadmap [1], which aims to establish a common architecture platform across market sectors with a potential $20B in annual revenue, silicon photonics is among the top ten emerging technologies. This has in part been a consequence of the recent involvement of large semiconductor companies around the world, particularly in the USA. Significant investment in the technology has also followed in Japan, Korea, and in the European Union. Low cost is a key driver, so it is imperative to pursue technologies that are mass-producible. Therefore, Silicon Photonics continues to progress at a rapid rate. This paper will describe some of the work of the Silicon Photonics Group at the University of Surrey in the UK. The work is concerned with the sequential development of a series of components for silicon photonic optical circuits, and some of the components are discussed here. In particular the paper will present work on optical waveguides, optical filters, modulators, and lifetime modification of carriers generated by two photon absorption, to improve the performance of Raman amplifiers in silicon.

We investigate the effects of silicon ion irradiation on free carrier lifetime and propagation loss in silicon rib waveguides, and thus its ability to reduce the density of two-photon-absorption (TPA) generated free carriers, an undesired effect of the Raman process in crystalline silicon. Our experimental results show that free carrier lifetime can be reduced significantly by silicon ion implantation. Associated excess optical absorption from the implanted silicon ions can be kept low if irradiation energy and dose are correctly chosen. Simulations of Raman amplification in silicon rib waveguides suggest that net gain can be achieved in certain cases without the need for an integrated diode in reverse bias to sweep out the photo-generated free carriers.

Strained Si channels are commonly used by manufacturers to enhance CMOS performance and research into novel channel materials (SiGe and Ge) is well underway. How these materials affect the electrical properties of the impurities used to dope them is largely unclear and the ability to accurately characterise dopant activation is key to finding this out. In the case of Si, since much is known about the relationship between carrier concentration and mobility, dopant activation can be assessed by competing techniques, however for the newer materials this information is not available. This paper demonstrates the differential Hall technique as a method capable of satisfying these gaps in our knowledge of dopant activation and mobility. Previously we have shown the technique, which combines Hall effect measurements with successive native oxide removal, can measure independent carrier and mobility profiles with resolution better than 1nm for B-implanted Si and SOI. Presently we show the technique is extendable to characterise n-type dopants (Sb and As) and importantly, can be applied to novel substrates (focussing here on strained Si). In addition, the inherent assumption of the technique – uniform layer removal – is investigated and shown reasonable. Complementary ion beam analysis is used to show how we investigate and correct for Hall scattering effects and designated software is used to apply necessary corrections, transforming raw data into reproducible and highly resolved, carrier and mobility profiles.

The creation of stable, highly conductive ultrashallow junctions in strained Si is a key requirement for future Si based devices. It is shown that in the presence of tensile strain, Sb becomes a strong contender to replace As as the dopant of choice due to advantages in junction depth, junction steepness, and crucially, sheet resistance. While 0.7% strain reduces resistance for both As and Sb, a result of enhanced electron mobility, the reduction is significantly larger for Sb due to an increase in donor activation. Differential Hall and secondary-ion mass spectroscopy measurements suggest this to be a consequence of a strain-induced Sb solubility enhancement following epitaxial regrowth, increasing Sb solubility in Si to levels approaching 1021cm−3. Advantages in junction depth, junction steepness, and dopant activation make Sb an interesting alternative to As for ultrashallow doping in strain-engineered complementary metal-oxide semiconductor devices.

In this paper, the advanced technology in the ultra-shallow-junction formation and its physical understanding for sub-nano CMOs devices are presented. After quickly presenting the device issues for the next generation of CMOs devices, we shall focus on the formation of highly activated Ultra-Shallow Source Drain extension. In fact, the formation of ultra- shallow junctions (USJ) for future integrated circuit technologies requires achieving hi h activa ion lev s d abrupt profiles. To achieve the challenging targets set out in the semiconductor roadmap, it is crucial to reach a much better understanding of die basic physical processes taking place during USJ processing. Subsequently, we review current understanding of dopant-defect interactions during thermal processing of device structures - interactions which are at the heart of the dopant diffusion and activation anomalies seen in USJ leading to device performance degradation. Based oil the physical understanding, we shall review and discuss some promising methods, such as co-implants (C, F, N), cluster/molecular implants and defect engineering as well as alternative thermal processes, for further do downscaling of source-drain resistance and junction depth. Emphasize on the impact on both PMOS and NMOS device performance will be presented. Finally, we will demonstrate that TCAD (Technology Computer Aided Design) can be successfully used for optimizing the new junction architecture to meet the nano-CMOS device performance requirements.

We investigate the effects of implanting silicon directly into a silicon waveguide to modify carrier lifetime. Experimental results show over 85% reduction in the carrier lifetime for only a small net increase in optical absorption.

Vacancy Engineering has previously been shown to be highly efficient in improving the junction properties of a p‐type boron implant. This study examines the effect of a Vacancy Engineering Implant (VEI) prior to a low‐energy n‐type phosphorous implant. These initial results indicate that an excess of vacancies not only reduces the observed enhanced diffusion but also reduces the inherent electrical deactivation/reactivation process.

This study examines the effect of a silicon Vacancy Engineering Implant (VEI) on a boron doped ultra-shallow junction, in terms of sheet resistance, junction depth and for the first time junction leakage - via conventional diode measurements and newer non-contact techniques. It is demonstrated that by using a VEI combined with a 10s, 800 degrees C anneal, it is possible to electrically activate the dopant to a level 5x higher than without a VEI, whilst sustaining minimal boron diffusion. Furthermore, this thermal budget is significant enough to reduce the implantation damage that resides within the depletion region to a level that produces a junction leakage value of similar to 35 mu A/cm(2), which is competitive with alternative techniques such as pre-amorphization and solid phase epitaxial regrowth.

Simulation and physical experiments have shown that vacancy engineering implants have the potential to provide outstanding pMOS source/drain performance for several future CMOS device generations. Using vacancy-generating implants prior to boron implantation, hole concentrations approaching 10(21) cm(-3) can be achieved using low thermal budget annealing. In this new study we propose that the vacancy engineering technique is not reliant on the implementation of SOI-based CMOS but is also directly applicable to bulk silicon technologies.

The International Roadmap for Semiconductors requires ultrashallow, highly activated, abrupt dopant profiles in the source/drain extension regions, for technology nodes beyond 45nm. The authors contrast B and BF2 implants in Si and silicon on insulator (SOI) substrates with and without a preamorphizing implant (PAI). The objective of the study is to compare between Si and SOI substrates, PAI and non-PAI condition, and B and BF2 implants. The results show the absence of the “reverse annealing effect” in BF2 implants, which is observed in B implants. The presence of F appears to impede the formation of boron interstitial clusters, which is shown in the case of B implant. The BF2 implants follow a similar trend for SOI and Si with and without PAI.

The creation of highly conductive ultrashallow-doped regions in strained Si is a key requirement for future Si based devices. It is shown that in the presence of tensile strain, Sb becomes a contender to replace As in strain-engineered CMOS devices due to advantages in sheet resistance. While strain reduces resistance for both As and Sb; a result of enhanced electron mobility, the reduction is significantly larger for Sb due to an increase in donor activation. Differential Hall measurements suggest this is a consequence of a strain-induced Sb solubility enhancement following solid-phase epitaxial regrowth, increasing Sb solubility in Si to levels approaching 10(21) cm(-3). Experiments highlight the importance of maintaining substrate strain during thermal annealing to maintain this high Sb activation. (c) 2008 Elsevier B.V. All rights reserved.

The effects of surface proximity and B concentration on end-of-range defect formation during nonmelt laser annealing in preamorphized silicon have been studied. These effects were analyzed by observing the activation and diffusion of an ultrashallow B implant, using Hall effect and secondary ion mass spectrometry measurements. By adjusting the preamorphizing implant and laser annealing conditions, B deactivation and diffusion were minimized, resulting in a sheet resistance of similar to 600 Omega/sq with a 16 nm junction depth. This is attributed to a combination of enhanced dissolution of end-of-range defects and preferential formation of B-interstitial clusters due to the surface proximity and high B concentration, respectively. (C) 2008 American Institute of Physics.

Highly active, ultra-shallow and abrupt dopant profiles are required for future generations of CMOS devices. A possible way to achieve this is to use pre-amorphization implantation (PAI) and solid phase epitaxial re-growth. B and BF2 implants were studied in bulk silicon and silicon-on-insulator with Ge PAL Results show that buried oxide (BOX) in SOI can be used a sink for silicon interstitials contributing to boron Transient Enhanced Diffusion and Boron-Interstitial Clustering. The BF2 implants show high mobility values and no deactivation.

Vacancy engineering has been proven to be a viable alternative to pre-amorphisation and solid phase epitaxy for creating ultra-shallow junctions. This paper investigates the effect of implantation order – i.e. whether the dopant implant is preceded or followed by the vacancy generating co-implant – in terms of Rs and diffusion. It is found that for optimal efficiency the co-implant should be performed first. Ultra-shallow boron layers created using this sequence can result in highly stable, ultra-shallow boron layers which do not deactivate significantly during annealing at 700°C for times ∼15min.

Forming highly conducting, ultra-shallow boron doped layers, is well known to be a challenge for future CMOS devices. This paper reviews a technique known as vacancy engineering, which is a co-implant process that has been proven to be efficient in reducing anomalous effects, such as transient enhanced diffusion and dopant clustering. Due to relatively low improvement factors, vacancy engineering has never been implemented as an industrial process. However, recent advancements demonstrate that by optimizing the implant substrate and anneal parameters it is possible to produce low resistive, p-type layers with a high degree of thermal stability which rival the more preferred techniques used today.