Providing timely access to text collections both locally and across the Internet is instrumental in making information retrieval (IR) truly useful. In this paper, we investigate how to exploit a symmetrical multiprocessor architecture to build high performance IR servers. We start by implementing a multithreaded IR server and a multitasking IR server to investigate that how best to execute multiple IR commands in parallel. We use InQuery, an inference network, full-text IR retrieval engine, to provide the basic IR services [5, 6, 20]. To expedite our investigation of possible system configurations, characteristics of IR collections, and the basic IR system performance, we implement a simulator with numerous system parameters, such as the number of CPUs, threads, disks, collection size, and query characteristics. We then validate the simulator against our implementation. By using multiple threads, CPUs, and disks, we demonstrate scalable performance for a variety of system configurations. We also find bottlenecks where additional threads, CPUs, and disks either degrade or have no impact on performance. Our results suggest that information retrieval is easily parallelized, but because it performs significant amounts of both I/O and CPU processing, to produce scalable performance requires a careful balance of hardware resources.

Web search engines, such as AltaVista and Infoseek, handle tremendous loads by exploiting the parallelism implicit in their tasks and using symmetric multiprocessors to support their services. The web searching problem that they solve is a special case of the more general information retrieval (IR) problem of locating documents relevant to the information need of users. In this paper, we investigate how to exploit a symmetric multiprocessor to build high performance IR servers. Although the problem can be solved by throwing lots of CPU and disk resources at it, the important questions are how much of which hardware and what software structure is needed to effectively exploit hardware resources. We have found, to our surprise, that in some cases adding hardware degrades performance rather than improves it. We show that multiple threads are needed to fully utilize hardware resources. Our investigation is based on InQuery, a state-of-the-art full-text information retrieval engine.

Java is an attractive choice for numerical, as well as other, algorithms due to the software engineering benefits of object‐oriented programming. Because numerical programs often use large arrays that do not fit in the cache, they suffer from poor memory performance. To hide memory latency, we describe a new unified compile‐time analysis for software prefetching arrays and linked structures in Java. Our previous work used data‐flow analysis to discover linked data structure accesses. We generalize our prior approach to identify loop induction variables as well, which we call recurrence analysis. Our algorithm schedules prefetches for all array references that contain induction variables. We evaluate our technique using a simulator of an out‐of‐order superscalar processor running a set of array‐based Java programs. Across all of our programs, prefetching reduces execution time by a geometric mean of 23%, and the largest improvement is 58%. We also evaluate prefetching on a PowerPC processor, and we show that prefetching reduces execution time by a geometric mean of 17%. Because our analysis is much simpler and quicker than previous techniques, it is suitable for including in a just‐in‐time compiler. Traditional software prefetching algorithms for C and Fortran use locality analysis and sophisticated loop transformations. We further show that the additional loop transformations and careful scheduling of prefetches from previous work are not always necessary for modern architectures and Java programs. Copyright © 2005 John Wiley & Sons, Ltd.

Abstract: EFFECTIVE COMPILE-TIME ANALYSIS FOR DATASEPTEMBER 2002BRENDON D. CAHOONB.A., CLARK UNIVERSITYM.S., UNIVERSITY OF MASSACHUSETTS, AMHERSTPh.D., UNIVERSITY OF MASSACHUSETTS AMHERSTDirected by: Professor Kathryn S. McKinleyThe memory hierarchy in modern architectures continues to be a major performancebottleneck. Many existing techniques for improving memory performance focus on Fortranand C programs, but memory latency is also a barrier to achieving high performancein...

Java is becoming a viable choice for numerical algorithms due to the software engineering benefits of object-oriented programming. Because these programs still use large arrays that do not fit in the cache, they continue to suffer from poor memory performance. To hide memory latency, we describe a new unified compile-time analysis for software prefetching arrays and linked structures in Java. Our previous work uses data-flow analysis to discover linked data structure accesses, and here we present a more general version that also identifies loop induction variables used in array accesses. Our algorithm schedules prefetches for all array references that contain induction variables. We evaluate our technique using a simulator of an out-of-order superscalar processor running a set of array-based Java programs. Across all our programs, prefetching reduces execution time by a geometric mean of 23%, and the largest improvement is 58%. We also evaluate prefetching on a PowerPC processor, and we show that prefetching reduces execution time by a geometric mean of 17%. Traditional software prefetching algorithms for C and Fortran use locality analysis and sophisticated loop transformations. Because our analysis is much simpler and quicker, it is suitable for including in a just-in-time compiler. We further show that the additional loop transformations and careful scheduling of prefetches used in previous work are not always necessary for modern architectures and Java programs.

this document. This frees implementationsto use a different class hierarchy than the one shown (or no hierarchy at all). Without a stack (or some similarentity), the interface would have to return intermediate results to the user code, and so the an implementationwould have to create objects with the type name specified for each routine.

Large document collections are increasingly available over the network. In order for users to access these collections, information retrieval systems must provide coordinated, concurrent, and distributed access. Since even unified information retrieval (IR) systems place heavy demands on system resources, it is unclear how performance will be effected as user demand increases and the distributed IR systems grow in size. In this paper, we present the implementation of a prototype system and simulator, and the design for experiments to study the performance of distributed IR systems. The prototype distributed information retrieval system is based on INQUERY, an existing, unified IR system. We have implemented a flexible simulation model to serve as a platform for analyzing performance issues given a wide variety of system parameters and configurations. We validate the accuracy of our simulation model using the prototype. We present a series of experiments that are designed to measure system utilization and identify bottlenecks. We vary numerous system parameters, such as the number of users and text collections, number of terms per query, response time, and system load to generalize our results for other distributed IR systems.