An electronically tunable reflection polarizer which exploits the dielectric anisotropy of nematic liquid crystals (LC) has been designed, fabricated and measured in a frequency band centered at 130 GHz. The phase agile polarizing mirror converts an incident slant 45° signal upon reflection to right hand circular (RHCP), orthogonal linear (-45 °) or left hand circular (LHCP) polarization depending on the value of the voltage biasing the LC mixture. In the experimental set-up this is achieved by applying a low frequency bias voltage of 0 V, 40 V and 89 V respectively, across the cavity containing the LC material.

Two models that can predict the voltage-dependent scattering from liquid crystal (LC)-based reflectarray cells are presented. The validity of both numerical techniques is demonstrated using measured results in the frequency range 94-110 GHz. The most rigorous approach models, for each voltage, the inhomogeneous and anisotropic permittivity of the LC as a stratified media in the direction of the biasing field. This accounts for the different tilt angles of the LC molecules inside the cell calculated from the solution of the elastic problem. The other model is based on an effective homogeneous permittivity tensor that corresponds to the average tilt angle along the longitudinal direction for each biasing voltage. In this model, convergence problems associated with the longitudinal inhomogeneity are avoided, and the computation efficiency is improved. Both models provide a correspondence between the reflection coefficient (losses and phase-shift) of the LC-based reflectarray cell and the value of biasing voltage, which can be used to design beam scanning reflectarrays. The accuracy and the efficiency of both models are also analyzed and discussed.

Nematic liquid crystals (LC) offer the capability to electronically reconfigure their dielectric permittivity tensor by applying a low AC voltage. This feature can find pertinent applications in submm-wave antenna technology in developing reconfigurable devices. In this contribution we review recent developments for the dielectric characterization of nematic liquid crystal samples at mm wavelengths and describe their applications in reconfigurable reflectarray antenna and tunable linear to circular polarization reflectors. The paper describes the theoretical aspects which underpin the technology that is employed for the realization, packaging and testing.

Silicon-on-sapphire (SOS) substrates have been proven to offer significant advantages in the integration of passive and active devices in RF circuits. Germanium on insulator technology is a candidate for future higher performance circuits. Thus the advantages of employing a low loss dielectric substrate other than a silicon-dioxide layer on silicon will be even greater. This paper covers the production of germanium on sapphire (GeOS) substrates by wafer bonding. The quality of the germanium back interface is studied and a tungsten self-aligned gate process MOST process has been developed. High low field mobilities of 450-500 cm2/V-s have been achieved for p-channel MOSTs produced on GeOS substrates. Thick germanium on alumina (GOAL) substrates have also been produced.

The rapid diffusion of phosphorus and boron in WSi2 has been characterized using a novel Schottky Barrier test structure. Diffusivity of both dopant species was about 4-5 orders of magnitude higher than that reported in polycrystalline silicon. The dopant diffusivity is strongly dependent on the silicide morphology. Diffusivity measured in low temperature pre-annealed silicide is approximately an order of magnitude higher than in silicide pre-annealed at 1050°C. The dopant diffusivity in oxide lined silicide test structures was 3-4.3x10-10 cm2 s-1 at 900°C while polycrystalline silicon lined structures exhibited a higher value at 900°C of 1.5x10-9 cm2s-1. This is attributed primarily to greater segregation of dopant to the oxide-silicon interface compared to the polysilicon-silicide interface. Boron exhibited a higher diffusivity in WSi2 with diffusivity in the range 4x10-9 cm2s-1 - 1x10-8 cm2s-1 at 900°C.

Novel test diode structures have been manufactured to characterise dopant diffusion in tungsten silicide layers. Bipolar diode action is demonstrated experimentally for anneal schedules of 30 minutes at 900degC, indicating long- range diffusion of phosphorus (~ 38 mum). The work function of the silicide was found to be 4.8 eV. SIMS analysis shows dopant redistribution is effected by the segregation to the silicide/oxide interface. The concept of conduit diffusion has been demonstrated experimentally for application in advanced bipolar transistor technology.

A novel technology is described for fabricating monolithic PIN diodes for use as switching devices in a circularly polarised reflectarray antenna. The process is based on silicon-on-silicide-on-insulator (SSOI) substrates. These have the advantage of a buried silicide contact layer of high conductivity, which also provides a dopant diffusion conduit, and a buried oxide providing low parasitic capacitance. In this initial prototype, the diode series resistance is consistently 10 Omega. The technique is believed to be a reliable, low complexity and cost effective method of producing a multi dipole reflectarray.

This paper covers some recent advances in the search for a silicon quantum cascade laser. These include intersubband lifetime measurements, growth of high quality structures on buried suicide layers, and demonstration of THz electroluminescence.

The use of buried tungsten silicide layers for confinement of terahertz optical modes is described. Silicon-on-silicide substrates are prepared using a bond and etch-back technique, and the successful growth of extremely long (600 period) strain-balanced p-Si/SiGe quantum cascade heterostructures on these substrates is demonstrated. THz electroluminescence is observed from these structures at low temperature, when the structure is biased so as to obtain interwell (‘diagonal’) transitions between heavy and light hole subbands. The emission shows a strong polarisation dependence, indicating the efficacy of the silicide layer in confining long wavelength TM modes.

Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of merit for application in mixed signal integrated circuits. The inclusion of the silicide layer in the structure may lead to stress or defects in the overlying SOI layers and resultant degradation of device performance. It is therefore essential to establish the quality of the silicon on the GPSOI substrate. MOS capacitor structures have been employed in this paper to characterize these GPSOI substrates for the first time. High quality MOS capacitor characteristics have been achieved with minority carrier lifetime of similar to 0.8 ms. These results show that the substrate is suitable for device manufacture with no degradation in the silicon due to stress or metallic contamination resulting from the inclusion of the underlying silicide layer.

A technology is described for fabricating SiGe heterojunction bipolar transistors (HBTs) on wafer-bonded silicon-on-insulator (SOI) substrates that incorporate buried tungsten silicide layers for collector resistance reduction or buried groundplanes for crosstalk suppression. The physical structure of the devices is characterized using cross section transmission electron microscopy, and the electrical properties of the buried tungsten silicide layer are characterized using sheet resistance measurements as a function of bond temperature. Possible contamination issues associated with the buried tungsten silicide layer are investigated by measuring the collector/base reverse diode tics. A resistivity of 50 /spl mu//spl Omega/cm is obtained for the buried silicide layer for a bond anneal of 120 min at 1000/spl deg/C. Collector/base reverse diode tics show a voltage dependence of approximately V/sup 1/2/, indicating that the leakage current is due to Shockley-Read-Hall generation in the depletion region. Fitting of the current-voltage tics gives a generation lifetime of 90 ns, which is as expected for the collector doping of 7 /spl times/ 10/sup 17/ cm/sup -3/. These results indicate that the buried tungsten silicide layer does not have a serious impact on junction leakage.

This paper reviews progress in SiGe HBT technology as well as work on Si bipolar transistors on insulator (SOI) along with current work on SiGe HBTs on SOL The state-of-the-art results on self-aligned selective epitaxially grown SiGe HBTs and SiGe:C HBTs clearly indicate the extendibility of these technologies into high-speed wired communication applications. Special emphasis is put on Silicon-on-Insulator HBT devices in vertical and lateral design. Research work on SOI SiGe HBT technology by a UK consortium has come up with a number of novel solutions, which are outlined. Moreover, issues regarding SOI operation in harsh environments are discussed.

Advanced integrated circuits may employ SOI substrates and incorporate both analogue and digital systems on a single chip. These system-on-chip integrated circuits are susceptible to cross talk noise generated by the digital components. This paper addresses the issue and describes an SOI substrate produced by wafer bonding which incorporates a tungsten silicide ground plane layer. This ground plane layer suppresses the cross talk yielding a20 dB improvement in performance compared with alternative techniques. Double gate MOS capacitor structures have been manufactured on these GPSOI substrates and the overlying silicon layer has been shown to be of high quality, unaffected by the underlying silicide. The buried insulator layer incorporates undoped polysilicon which has been shown to act as a dielectric layer.