The requirements for more advanced, longer, and more precise molecular dynamics simulations are greater than ever. Even though we are better at optimizing and have more computational power than previously, there is also a continuing need to make simulations even faster, more reliable, and cheaper to run. In this paper, we are presenting a method for running a molecular dynamics simulation on an FPGA device by using Synchronous Message Exchange. The molecular dynamics simulation presented in this paper is a basic simulation using the Lennard-Jones potential. It is a work in progress, but the results are promising compared to a Python implementation using matrix calculations. We present a proof of concept of an initial solution and its performance provides results that make us believe that a full molecular dynamics implementation would be feasible and competitive.

For several decades, the CPU has been the standard model to use in the majority of computing. While the CPU does excel in some areas, heterogeneous computing, such as reconfigurable hardware, is showing increasing potential in areas like parallelization, performance, and power usage. This is especially prominent in problems favoring deep pipelining or tight latency requirements. However, due to the nature of these problems, they can be hard to program, at least for software developers. Synchronous Message Exchange (SME) is a runtime environment that allows development, testing and verification of hardware designs for FPGA devices in C#, with access to modern debugging and code features. The goal is to create a framework for software developers to easily implement systems for FPGA devices without having to obtain heavy hardware programming knowledge. This article presents a short introduction to the SME model as well as new updates to SME. Lastly, a selection of student projects and examples will be presented in order to show how it is possible to create quite complex structures in SME, even by students with no hardware experience.

Segmented operations, such as segmented sum, segmented scan and segmented sort, are important building blocks for parallel irregular algorithms. We in this work propose a new parallel primitive called segmented merge. Its function is in parallel merging q sub-segments to p segments, both of nonuniform lengths. We implement the segmented merge primitive on GPUs and demonstrate its efficiency on parallel sparse matrix transposition (SpTRANS) and sparse matrix-matrix multiplication (SpGEMM) operations.

So far, our pure Python, primitive equation ocean model Veros has been about 50% slower than a corresponding Fortran implementation. But recent benchmarks show that, thanks to a thriving scientific and machine learning library ecosystem, tremendous speed-ups on GPU, and to a lesser degree CPU, are within reach. On GPU, we find that the same model code can reach a 2-5 times higher energy efficiency compared to a traditional Fortran model. We thus propose a new generation of geophysical models. One that combines high-level abstractions and user friendliness on one hand, and that leverages modern developments in high-performance computing on the other hand. We discuss what there is to gain from building models in high-level programming languages, what we have achieved, and what the future holds for us and the modelling community.

This paper introduces an event-driven solution for modern scientific workflows. This novel approach enables truly dynamic workflows by splitting them into their constituent parts, defined using combinations of Patterns and Recipes, and lacking any meaningful inter-dependencies. The theory behind this system is set out, and an example workflow is presented. A python package mig_meow, which implements this workflow system is also shown and explained. The use cases of various user groups are considered to asses the feasibility of the design, and it is found to be sufficient, especially in light of recent workflow requirements for dynamic looping, optional outputs and in-the-loop interactions.

In this paper, it is shown how teaching platforms at educational institutions can utilize cloud platforms to scale a particular service, or gain access to compute instances with accelerator capability such as GPUs. Specifically at the University of Copenhagen (UCPH), it is demonstrated how the internal JupyterHub service, named Data Analysis Gateway (DAG), could utilize compute resources in the Oracle Cloud Infrastructure (OCI). This is achieved by utilizing the introduced Cloud Orchestrator (corc) framework, in conjunction with the novel JupyterHub spawner named MultipleSpawner. Through this combination, we are able to dynamically orchestrate, authenticate, configure, and access interactive Jupyter Notebooks in the OCI with user defined hardware capabilities. These capabilities include settings such as the minimum amount of CPU cores, memory and GPUs the particular orchestrated resources must have. This enables teachers and students at educational institutions such as UCPH to gain easy access to the required capabilities for a particular course. In addition, we lay out how this groundwork, will enable us to establish a Grid of Clouds between multiple trusted institutions. This enables the exchange of surplus computational resources that could be employed across their organisational boundaries.

This paper explores how a skeleton based approach can be used to perform big data analysis. We introduce a restricted storage system based on blocks with a fixed maximum size. The storage design removes the residual data problem commonly found in storage systems, and enables processing on individual blocks. We then introduce a stream-oriented query system that can be used on top of the distributed storage system. The query system is built on a limited number of core operations. Each of the perform a specified function, such as filtering elements, but are skeleton operations where the programmer needs to fill in how to perform the operation. The operations are designed to allow splitting across the blocks in the storage system, giving concurrent execution while maintaining a completely sequential program description. To assist in understanding the data flow, we also introduce a graphical representation for each of the methods, enabling a visual expression of an algorithm. To evaluate the query system we implement a number of classic Big-Data queries and show how to implement them with code, and how the queries can be visualized with the graphical representation.

By utilizing Synchronous Message Exchange (SME) for hardware design, we see that going from a hardware schematic to an implementation becomes a much shorter process. This in turn shifts the focus to the architectural details of the implementation. This is shown by constructing an implementation of the Transputer in SME. This implementation has been made in less than 800 lines of code within the timeframe of ~4 months, where the majority of the time spent has been on the Transputer architecture. The resulting implementation is suboptimal compared to similar projects. However, since no optimizations have been made, reaching a more reasonable resource consumption and clockrate should be attainable within a few months.

MALLEABLE HARDWARE Skovhede, Kenneth (MAX IV Laboratory, Lund University, Lund, SWE); Barczyk, Artur (MAX IV Laboratory, Lund University, Lund, SWE); Johnsen, Carl (Niels Bohr Institute, University of Copenhagen, Copenhagen, DNK); Kristensen, Mads R.B. (Niels Bohr Institute, University of Copenhagen, Copenhagen, DNK); Vinter, Brian (Niels Bohr Institute, University of Copenhagen, Copenhagen, DNK); Matej, Zdenek (MAX IV Laboratory, Lund University, Lund, SWE)

The acceptance of Ruby in the scientific community lags a bit behind, partly because it is missing a good library for linear algebra and vector programming. It has a matrix class in its standard library, but its execution tends to be rather slow. Only a couple of actual scientific computing libraries like NumPy for Python exist for Ruby. In this paper we introduce a new library called Bohrium.rb. Bohrium.rb acts as a front end for the Bohrium framework, which generates and runs JIT-compiled OpenMP/OpenCL kernels. It currently supports Python/NumPy and C++, however as it is built of processes communicating hierarchically to each other, we can replace the front ends with new ones. This new Ruby front end is described with examples and is then compared to the standard library and an already established Ruby library Numo/Narray, where Bohrium.rb seems to be faster for still larger matrix calculations. This is also the trend we have seen in similar areas with Bohrium, being faster once its overhead has been amortized.

This paper introduces a method to simplify hardware modeling and verification thereof in order for software programmers to, more easily, meet the demands of the growing embedded device industry. We describe a simple method for transpiling from the new SME Implementation Language into CSPMand using formal verification to verify properties within the generated program. We present a small example consisting of a seven segment display clock network and introduce how to verify the widths of the channels in the network.

Exponential growth in scientific data set sizes and corresponding computation needs, forces scientists and engineers to structure and automate experiments in workflows running on distributed architectures. In eScience the flows typically evolve gradually from intensive experimentation and often involve multiple participants from separate organisations. Thus, there's a need for infrastructures supporting such highly dynamic and collaborative workflows. Despite much attention to scientific workflows in recent years, most existing systems tend to be single-user top-down approaches, which are inherently best suited for static and fixed flows with all steps known up front. In this work we introduce a simple general rule-based model for event-driven workflows based on data change triggers. A bottom-up workflow approach, that enables a high level of automation and allows dynamically changing flows – with or without manual user interaction. It is realised with an implementation on top of the Minimum intrusion Grid (MiG), which helps de-couple workflow design from underlying execution concerns, and provides built-in collaboration and sharing across organisation boundaries. However, the model itself applies to much wider range of scenarios, and other such possible implementation methods are briefly outlined.

While CSP is traditionally taught as an algebra, with a focus on definitions and proofs, it may also be presented as a style of programming, that is process-oriented programming. For the last decade University of Copenhagen (UCPH) has been teaching CSP as a mix of the two, including both the formal aspects and process-oriented programming. This paper summarized the work that has been made to make process-oriented programming relevant to students, through programming assignments where process orientation is clearly simpler than an equivalent solution in imperative programming style.

Existing approaches to concurrent programming, albeit essential, are easily used incorrectly. Testing is difficult due to the inherent non-determinism introduced by concurrency, especially in embedded systems (e.g., the Mars Rover catastrophe). DOMASCOS' goal is to produce (a) experts in concurrency programming and (b) libraries of concurrency program skeletons freeing applications from concurrency bugs – or, at least, significantly reducing their occurrence. Hence, programmers will no longer be required to implement their own concurrency mechanisms, but inherit guaranteed correct concurrency schemas directly from the DOMASCOS library. DOMASCOS addresses the problem of Reusable Concurrency for Modern System Design, supporting Europe to be at the forefront as the number of computationally enabled devices increases. DOMASCOS consists of concurrent groups of people sharing expertise in formally expressing correct concurrency, but who differ in application domains: namely high-performance computing, GPU programming, embedded systems and robotics. The variety in applications ensures versatility of the skeletons and the shared concurrency knowledge ensures coherence in the team.

In this paper we investigate the use of the CSP programming model for implementing distributed systems in an educational setting. For a practical example we choose a well-studied classic distributed system: a distributed hash table. We describe our implementation and compare it to a number of existing open-source implementations. We discuss a number of parameters for the example implementation, such as amount of code, potential for errors, and similar parameters.

PyCSP provides a CSP (Communicating Sequential Processes) based library for Python, where CSP processes can be executed as threads, operating system processes or greenlets. The main drawback of using threads and processes is that they limit the number of CSP processes that a program can use due to operating system restrictions and memory and synchronisation overheads. This overhead is reduced when using greenlets, but requires the use of an external library. aPyCSP is an experimental implementation of PyCSP that uses recent support for coroutines in Python and the asyncio library. This paper explores two implementation approaches for aPyCSP where the most recent version is shorter, simpler to read and understand and supports more functionality than the original version, including generic channel support and input and output guards. We believe some of the identified implementation techniques can be useful for other CSP libraries. The aPyCSP implementation is also faster and uses less memory per CSP process, allowing us to scale to 15 million processes on a computer with 64 GB memory.

This paper describes how a concept-based approach to teaching was used to update how concurrent and distributed systems were taught at the University of Copenhagen. This approach focuses on discussion to drive student engagement whilst fostering a deeper understanding of the presented topics compared to more traditional displays of crude facts. The course is split into three sections: local concurrency, networked concurrency, and concurrency in hardware. This allows for an easier student journey through the course, as they are introduced to all core concepts in the first section, then have them reinforced in greater detail in the subsequent sections. Finally, the experience gained in updating this course is presented so others attempting to do similar may learn from it.