This study deals with reliability methods developed for power electronic devices dedicated to the aerospace industry, because the reliability is a key issue for safe aerospace applications. Based on end-user requirements, eight different types of non-hermetic power electronic components in standard plastic package have been selected from the commercial marketplace, in particular Si and SiC power electronic devices. These devices are COTS (Component Off The Shelf). The main failure modes and mechanisms expected have been highlighted in specific environments in accordance with the literature. They will be presented in the final paper.

This study is addressing on the reliability of COTS (Commercial Off-The-Shelf) power electronic components and modules which could be used in high reliability systems such as aerospace systems. This paper details the first followed steps to achieve a reliability assessment of some COTS power devices. These first steps are: Construction analyses for the determination of the packaging assembly technologies of COTS power devices; Discussion on the material used in COTS power devices; Synthesis of the potential failure risk analysis under harsh environments; Determination of several accelerated ageing tests to check the potential failure modes and mechanisms in power electronic for aerospace systems.

This paper presents the development of a new packaging technology using silicon carbide (SiC) power devices. These devices will be used in the next power electronic converters. They will provide higher densities, switching frequencies and operating temperature than current Si technologies. Thus the new designed packaging has to take into account such new constraints. The presented work tries to demonstrate the importance of packaging designs for the performance and reliability of integrated SiC power modules. In order to increase the integrated density in power modules, packaging technologies consisting of two stacked substrates with power devices and copper bumps soldered between them were proposed into two configurations. Silver sintering technique is used as die-attach material solution. In order to assess the assembling process and robustness of these packaging designs, the thermo-mechanical behaviour is studied using FEM modelling. Finally, some recommendations are made in order to choose the suitable design for reliable power modules

A continuum damage model is proposed for Sn3.0Ag0.5Cu solder alloy in pure shear conditions. Experimental tests were performed on specific torsion samples to adjust material parameters of the continuum damage model. The main advantage of this method is to introduce damage process in the mechanical behaviour law of SnAgCu solder. Damage process highly affects the mechanical behaviour of solder alloy during thermal cycle fatigue. Thus, the lifetime of solder can be estimated by using this model without the determination of fatigue laws.

Les modeles d'endommagement continu permettent de connaitre l'etat d'endommagement des materiaux a tout instant et donc de predire le comportement en fatigue. Un modele d'endommagement continu est propose pour l'alliage Sn3,0Ag0,5Cu en fatigue oligocyclique. Ce modele permet de modeliser le comportement mecanique cyclique et l'endommagement de fatigue des brasures. Le modele est identifie en cisaillement pur, principal mode de sollicitation des joints brases sous cycles thermiques. Les simulations numeriques montrent une bonne correlation avec les resultats experimentaux pour le comportement non endommage. Les resultats de la modelisation de l'endommagement mettent en evidence les limites du modele actuel.

This study presents a method to assess component durability under random vibration according to board design and package specificities.Experimental tests were performed and times-to-failure (TTF) of several components were recorded. Consequently, failure modes of packages were identified.A complete FE (Finite Element) board model with 3D packages of CICGA (Ceramic Interposer Grid Array), PLCC (Plastic Leaded Chip Carrier) and FBGA (Fine Ball Grid Array) components was built. Dynamic behaviour of the board was adjusted with experimental measurements. Transfer functions in stress in critical solder joints were thus calculated for five components.Finally, a damage estimation, which consists in the generation of time-stress responses, was performed. Rainflow cycle counting, linear summation and Basquin's equation were used to compute the elastic damage accumulation in solder joints. Results were confronted and adjusted with experimental TTF. The method is explained and results are discussed.

Numerical methods have become a useful mean to predict the thermo-mechanical reliability of solder interconnects in electronics, at least comparatively. In principle, each calculation finally rests on a creep fatigue model or criterion. The article reviews some important failure models of solder found in literature, discusses their benefits and drawbacks, and finally compares them on the example of a semi-analytical assembly model. Cyclic fatigue criteria constitute the classical approach in creep fatigue modelling. Strain range, strain range partitioning, inelastic energy and energy partitioning, are all approaches which have lead to successful development of failure models for solder in electronics. Beside cyclic criteria, continuous damage mechanical models have been developed recently in different publications. They are basically extended sets of constitutive equations including a new variable called damage. In such approaches, damage may be integrated over any cyclic or non-cyclic solicitation. A semi-analytical model of a flip chip PBGA (plastic ball grid array) assembly has been developed in order to implement a continuous damage mechanical approach. Then it is used for comparisons with some cyclic fatigue criteria on the same thermal cycle. The assembly model is based on the theory of bi-material thermostats and on a continuous damage mechanical model found in a recent publication. Only the outline of the model is described. Easy parametrisation and short calculation delays allow to run the model over high number of thermal cycles and to study the damage evolution. Results have not been correlated with experimental data, but are in a correct order of magnitude, whatever failure criterion is applied.

In order to successfully implement reliable flip chip packaging technology, a parametric study based on solder fatigue modelling is reported. Four packages (FCBGA, Hi-TCE BGA, CBGA, CCGA) and three printed circuit boards (FR4, polyimid-glass and aramid paper) are simulated with both levels of solder joints. It is then possible to determine the location of the most constrained areas and the number of cycles to 50% failure. Moreover, it permits to select a reliable package for a specific board and inversely.