Single-hop WDM networks with a central passive star coupler (PSC), as well as single-hop networks with a central arrayed-waveguide grating (AWG) and a single transceiver at each node, have been extensively studied as solutions for the quickly increasing amounts of unicast and multicast traffic in the metropolitan area. The main bottlenecks of these networks are the lack of spatial wavelength reuse in the studied PSC based networks and the single transceiver in the studied AWG based metro WDM networks. In this paper we develop and evaluate the FTλ-FRλ AWG network, which is based on a central AWG and has arrays of fixed-tuned transmitters and receivers at each node. Transceiver arrays are a mature technology, making the proposed network practical. In addition, the transmitter arrays allow for high speed signaling over the AWG while the receiver arrays relieve the receiver bottleneck arising from multicasting in conjunction with spatial wavelength reuse on the AWG. Our results from probabilistic analysis and simulation indicate that the FTλ-FRλ AWG network gives particularly good throughput-delay performance for multicast traffic with small multicast group sizes or localized destination nodes, as well as for a mix of unicast and multicast traffic.

This paper investigates the design optimization of digital free-space optoelectronic interconnections with a specific goal of minimizing the power dissipation of the overall link, and maximizing the interconnect density. To this end, we discuss a method of minimizing the total power dissipation of an interconnect link at a given bit rate. We examine the impact on the link performance of two competing transmitter technologies, vertical cavity surface emitting lasers (VCSELs) and multiple quantum-well (MQW) modulators and their associated driver-receiver circuits including complementary metal-oxide-semiconductor (CMOS) and bipolar transmitter driver circuits, and p-n junction photodetectors with multistage transimpedance receiver circuits. We use the operating bit-rate and on-chip power dissipation as the main performance measures. Presently, at high bit rates (>800 Mb/s), optimized links based on VCSELs and MQW modulators are comparable in terms of power dissipation. At low bit rates, the VCSEL threshold power dominates. In systems with high bit rates and/or high fan-out, a high slope efficiency is more important for a VCSEL than a low threshold current. The transmitter driver circuit is an important component in a link design, and it dissipates about the same amount of power as that of the transmitter itself. Scaling the CMOS technology from 0.5 /spl mu/m down to 0.1 /spl mu/m brings a 50% improvement in the maximum operating bit rate, which is around 4 Gb/s with 0.1 /spl mu/m CMOS driver and receiver circuits. Transmitter driver circuits implemented with bipolar technology support a much higher operating bandwidth than CMOS technology; they dissipate, however, about twice the electrical power. An aggregate bandwidth in excess of 1 Tb/s-cm/sup 2/ can be achieved in an optimized free-space optical interconnect system using either VCSELs or MQW modulators as its transmitters.

Passive electrical circuits whose voltage and current equations are exactly equivalent to the small-signal rate equations of a semiconductor laser are derived to model an electrically modulated laser (verified to be the same as that given in the literature), an optically modulated laser (i.e., a laser used as an optical amplifier), and a multimode laser. These circuits offer a fast and efficient simulation tool with little computational complexity in which the small-signal assumption (i.e., small modulation range) is neither violated nor insufficient for the simulation.

Chatoyant is a tool for the simulation and the analysis of heterogeneous free-space optoelectronic architectures. It is capable of modeling digital and analog electronic and optical signal propagation with mechanical tolerancing at the system level. We present models for a variety of optoelectronic devices and results that demonstrate the system's ability to predict the effects of various component parameters, such as detector geometry, and system parameters, such as alignment tolerances, on system-performance measures, such as the bit-error rate.

Optical transimpedance receivers implemented in CMOS VLSI technologies are modeled and optimized for freespace optoelectronic interconnections. Sensitivity, bandwidth, power dissipation, and circuit area are analyzed for receivers using three different submicron CMOS processes. A comparison with the circuit noise limited optical power indicates that, for digital computing applications, the receiver sensitivity is limited by the gain-bandwidth product of the receiver amplifiers and the necessary noise margin of logic circuits.

The heterogeneous integration of optoelectronic, electronic, and micro-mechanical components from different origins and substrates makes possible many advanced systems in diverse applications. Besides the monolithic integration approach, which is the basis for the success of today's silicon industry, various hybrid integration technologies have been explored. These include flip-chip bonding, micro-robotic placement, epitaxial lift-off and direct bonding, substrate removal and bonding, and several self-assembly methods. In this paper, we describe the results of our monolithic integration effort involving a 2 by 2 optoelectronic switching circuit and an 8 by 8 active-pixel sensor array on GaAs substrates, and a 16 by 16 spatial light modulator array produced by flip-chip bonding of III-V multi-quantum-well (MQW) modulators and silicon driver circuits. We also present our preliminary experimental results on the self-assembly of small inorganic devices coated with DNA polymers with self- recognition properties.

Multiple-quantum-well (MQW) electro-optical devices have demonstrated high speed operation for optical links, switching, and detection 1 . Integration of MQW devices with III-V modulation-doped field effect transistors (MODFETs) provides a mean of realizing monolithically integrated optoelectronic circuits where the performance penalty associated with hybrid packaging between photodetector, modulator and electronic Si circuits is minimized and the overall performance can be maximized. In this paper, we report the results of two integration technologies. One is based on InAlGaAs/InGaAs MQW materials on a GaAs substrate; the other utilizes a substrate removal process. Both technologies permit further integration of III-V opto-electronic (OE) circuits with silicon circuitry using flip-chip bonding techniques. To this end, a III-V 2x2 optoelectronic switch has been implemented using this approach for subsequent flip-chip integration with CMOS circuitry.

This paper presents a system capable of static and dynamic simulationsof heterogeneous opto-electronic systems. It is capable ofmodeling Gaussian optical signal propagation with mechanicaltolerancing at the system level. We present results which demonstratethe system's ability to predict the effects of various componentparameters, such as detector geometry, and system levelparameters, such as alignment tolerances, on system performance.

Free space optoelectronic information processing systems are key components of the next generation of computers and communications networks. Currently the “state of the art” for design and analysis of these systems is to use a set of ad-hoc procedures to generate end-to-end system performance estimates based on empirical characterizations of the component devices. This painstaking technique results in rough approximations, which must then be refined by actually prototyping each of the particular systems under consideration. As a result, while many systems have been proposed, few FS-O/E systems have been designed, and fewer still have been built.

Photonics is playing an increasing role in modern communication, information processing, and data storage. As integrated optoelectronic systems grow in size and the desired operating bandwidth increases, new packaging techniques, such as fluidic self-assembly,1 robotic precision assembly,2 and DNA-based methods,3,4 have attracted great research interest. In this paper, we report a DNA self-assembly process and discuss its application to the construction of photonic crystals.

Free-space optoelectronic systems continue to progress towards higher density interconnects (thousands of links) operating at high speeds (Gbit/sec) in small feature-size CMOS technology (0.5 μm and less). The interconnection density in a free-space system is limited by the power dissipation of the interconnects. This limit occurs when the system reaches the maximum power dissipation per unit area dictated by the cooling technology. Minimizing the power dissipation in the interconnects enables a system designer to maximize the interconnect density at a given bit-rate, or similarly, to maximize the bit-rate for a given interconnect density. Since the interconnect density is related to the system operating bit-rate through the power dissipation, a useful figure of merit is their product - the aggregate bandwidth (AGBW) per unit area. By minimizing the power per link over a range of bit-rates, the conditions which maximize the AGBW per unit area can be ascertained.

The design of the optical receiver is an integral part of any optical interconnection scheme. The performance and information handling capacity of the free-space optical link depend to a large extent on the receiver's gain, speed, power consumption, and area requirements. In general, these four parameters can be traded off against each other. We have developed a framework for modeling receivers based on digital CMOS technology, and optimizing the design to minimize either the optical power requirement or the total power requirement.

We evaluate current vertical-cavity surface-emitting laser (VCSEL) and multiple-quantum-well (MQW) modulator technologies for low-fanout system applications. Si-CMOS transimpedance receiver circuits are used in the comparison. The aggregate bandwidth per unit area is calculated from the bandwidth and the total on-chip power dissipation. The results indicate that the electrical power dissipation in the receiver circuits dominates at low operating frequencies. At high operating frequencies the receiver gain drops significantly, thus more electrical power is dissipated in the transmitter to provide more optical power to the receiver to satisfy the voltage requirement at the receiver output. In VCSEL based systems, the optical power is generated entirely on-chip. Thus, only VCSELs with low threshold current and low series resistance would be able to provide the same aggregate bandwidth as the MQW modulator based systems.

Lead lanthanum zirconate tit an ate , PLZT (9/65/35) thin films were deposited on r-plane sapphire and PtISi by triode-magnetron sputtering at low temperature and transformed to t h e perovskite phase by rapid-thermal annealing. To form perovskite phase directly during depos i t ion requires high substrate temperatures which generally cause lead and/or titanium deficiency. A t relatively low deposition temperatures, t h e deposited films tend to consist of both pyrochlore and perovskite phases. A full transformation o f pyrochlore to perovskite phase is difficult. With low temperature deposition and rapid-thermal annealing, perovskite PLZT (9/65/35) films wi th strong (110) orientation were obtained. Their optical and dielectric properties are reported.

Optoelectronic computing systems that combine electronic circuits with optical interconnect elements have been considered for many applications where the cost of communication is higher than that of computation. We have previously developed a method of evaluating the performance of the optoelectronic interface, referred to as a photonics layer, and examined various transmitter and receiver technologies separately. In this paper, we report our recent results in the design optimization of the overall photonics layer. We examine the total electrical power dissipated in both the transmitter and the receiver modules, and optimize the receiver configurations to achieve a minimum electrical power dissipation at a given bit rate.

Hybrid integration of III-V based optical devices, such as modulators, LEDs, and lasers, with silicon VLSI technology promises cost effective solutions to many optoelectronic challenges. It combines the low cost, high density, and high yield of silicon circuitry with the unique optical properties of III-V devices. Flip-chip bonding is a mature and commercial technology. It provides a means of reliable, rapid integration of these two types of devices.1

We investigate the performance of free-space optical interconnection systems at the technology level. Specifically, three optical transmitter technologies, lead-lanthanum-zirconate-titanate and multiple-quantum-well modulators and vertical-cavity surface-emitting lasers, are evaluated. System performance is measured in terms of the achievable areal data throughput and the energy required per transmitted bit. It is shown that lead-lanthanum-zirconate-titanate modulator and vertical-cavity surface-emitting laser technologies are well suited for applications in which a large fan-out per transmitter is required but the total number of transmitters is relatively small. Multiple-quantum-well modulators, however, are good candidates for applications in which many transmitters with a limited fan-out are needed.

Optical interconnections have been proposed to replace electrical wires for global data communications in computing systems to alleviate communication bottlenecks on the electronic processing planes. The potential for high speed, high connection density, and low energy has been analyzed.['] Compared to an all-electronic system, an additional subsystem is needed in an optical interconnection system. This subsystem, referred to as the photonics layer, provides elecytrical-optical signal conversions and proper signal routing. It contains optical transmitters and drivers, detectors and amplifiers, and optical routing elements, and is considered to begin at the transmitter driver input and end at the detector amplifier output. We attempt to evaluate the performance of the photonics layers for free-space optical interconnections when using lead-lanthanum-zirconate-titanate (PLZT) modulators, III-V semiconductor multiple-quantumwell (MQW) modulators, or vertical-cavity surface emitting lasers (VCSELs) transmitter technologies. The areal data throughputs and the energy requirements are discussed for implementations of various network architectures.

An InxAlyGa1-x-yAs device layer structure that enables the monolithic integration of In0.25Al0.75As/In0.15Ga0.85As MODFETs and In0.25Al0.35Ga0.40As/In0.25Ga0.75As MQW modulators is reported. Current gain cutoff frequencies of 10 GHz are measured for 1 mu m gate length MODFETs. MQW modulators operating at 1.05 mu m demonstrate 20% transmission modulation for an applied 8 V.