In order to foster uptake by scientific and business users we need an easy way to access Grid resources. This is the motivation for the A-WARE project. We build upon a fabric layer of Grid and other resources, by providing a higher-layer service for managing the interaction with these resources - A One-Stop, Fire-and-(almost)Forget, Dropping-off and Rendezvous Point. Work assignments can be formulated using domain specific dialects, allowing users to express themselves in their domain of expertise. Both Web service and REST bindings are provided, as well as allowing the component to be embedded into other presentation technologies (such as portals). In addition common desktop notification mechanisms such as Email, RSS/Atom feeds and instant messaging keep users informed and in control. We propose using the Java Business Integration specification as the framework for building such a higher-level component, delivering unprecedented opportunities for the integration of Grid technologies with the enterprise computing infrastructures commonly found in businesses.

Applications of High-Performance Computers spans a large intellectual area and now includes all the traditional application science and engineering fields. The end goal of all high performance computing research is eventually to support applications, but those applications have traditionally had a strong feedback effect on computer architecture, hardware design, and systems.

The primary motivHtion behind thi,; special issue stems

The need for an the suitability of MIMD computing in real time data processing have been long established. Simulators built with arrays of analogue computers and systems designed around multiple mini computer have been in use for years. With both of these solutions considerable effort is required in alterations to the software are needed. The flight simulation group at MBB (Messerschmitt Bolkow Blohm) is running real time flight simulators for the purpose of designing aircraft, and hence the model is altered several times per day. Their system is centred on the Denelcor HEP (Heterogenous Element Processor) computer which delivers the needed speed in an MIMD environment with more flexibility than a an SISD system could provide. This paper will described the operations of flight simulation at MBB, the architecture of the HEP, how the simulator is constructed and programmed, and some figures on system performance.

There has been a convergence in computer architecture toward a distributed memory implementation of a shared memory user model. This has brought about the possibility of using a very large number of processors, on NWP applications, from the realm of research into reality. The simplicity of the shared memory model has meant that porting the very large Unified Model can be approached. However, although the shared memory model allows freedom of movement, the ability to achieve high performance can require very detailed analysis of many of the same issues faced by practicioners of distributed memory programming. This paper chronicles the process of porting the sequential version of the Unified Model to the KSR virtual shared memory supercomputer and outlines some of the issues which must be faced in obtaining a high performance implementation on the KSR. 1. Background The formulation of the Unified Model (UM) differs in several respects from that of many other models currently in use. It is a grid point model which has been developed with a certain degree of portability in mind. These aspects make it highly amenable to transfer to other architectures, and the details relevant to this follow.