Dennis E Hoffman | AMiner学者主页

1Exploiting Multiple Vt and Copper Interconnects

T Mcpherson,R Averill,D Balazich,K Barkley,S Carey,Yiuhing Chan, R Crea,A H Dansky, R Dwyer, A Haen,D E Hoffman, A Jatkowski,

2000引用：4

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2Chip Integration Methodology the IBM

R. M. Averill,K. Barkley, Mark Bowen,P. J. Camporese,A.H. Dansky,R. F. Hatch,D. E. Hoffman, M. Mayo,S. A. McCabe,T. G. McNamara,T. McPherson,G. A. Northrop,

1999

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3600MHz G5 S/390 Microprocessor

G. Northrop,R. Averill,K. Barkley,S. Carey,Y. Chan,Y. H. Chan,M. Check,D. Hoffman,W. Huott, B. Krumm,C. Krygowski, J. Liptay,

1999引用：32

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4Chip integration methodology the IBM

R. M. Averill, K. G. Barkley III,M. A. Bowen,Peter J Camporese,A. H. Dansky,R. F. Hatch,D. E. Hoffman,M. D. Mayo,S. A. McCabe,Timothy G Mcnamara,T. J. McPherson,G. A. Northrop,

1999引用：23

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5The Development of Ultra-High-frequency VLSI Device Test Systems

CW RODRIGUEZ,DE HOFFMAN

The development of test systems for high-performance semiconductor logic and memory devices is discussed. The capabilities of shared-resource and tester-per-pin system architectures are reviewed. Test-system hardware design to provide high-speed pin electronics and generation of LSSD, weighed random, and algorithmic patterns is described. The reasons for the selection of the tester-per-pin system ...

1990IBM Journal of Research and Development（1990）引用：5

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6Advanced microprocessor

W. V. Huott,T. J. Koprowski,B. J. Robbins,M. P. Kusko,S. V. Pateras,D. E. Hoffman,T. G. McNamara,T. J. Snethen

引用：23

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