We present arguments that additional effects besides laterally homogenous tunnelling might occur in carrier-selective poly-Si/c-Si junctions: (i) the symmetrical electrical behaviour of n+ and p+ poly-Si/c-Si junctions, (ii) direct observation of structural modifications of the interfacial oxide upon thermal treatment by transmission electron microscopy, even for poly-Si/c-Si junctions with good passivation quality, and (iii) the achievement of low junction resistances even for interfacial oxide thicknesses >2nm after thermal treatment. We present an alternative picture, essentially based on a localized current flow through the interfacial oxide, mediated either by local reduction of the oxide layer thickness or by pinholes. In consequence, the local current flow implies transport limitations for both minority and majority carriers in the c-Si absorber, and thus a correlation between recombination current and series resistance. Thus, a poly-Si/c-Si junction can also be explained within the framework of a classical pn junction picture for a passivated, locally contacted emitter, e.g. by the model of Fischer. Both electron selective contacts (n+ poly-Si) and hole selective contacts (p+ poly-Si) can be described consistently when using reasonable input parameters. Especially for p+ poly-Si/c-Si junctions, our model could guideline further improvement.

We report on the impact of a surfactant on the growth mode and strain relaxation of thin Ge films on Si0.21Ge0.79 virtual substrates grown by surfactant mediated epitaxy on Si(001) wafers. Ge epitaxy without surfactant results in island formation after deposition of only 5nm Ge. A certain part of the strain in the Ge islands is relaxed via interfacial misfit dislocations, which are located within the core part of the islands. We discuss the possibilities for the occurrence of three-dimensional growth at low Ge layer thickness. The use of Sb as a surfactant suppresses three-dimensional islanding and enables the growth of smooth pseudomorphically strained Ge films on Si0.21Ge0.79(001) virtual substrates up to a thickness of 10nm. At thicknesses higher than 20nm, the films relax via the formation of a misfit dislocation network at the Ge/ Si1−xGex interface. The surface roughness of up to 30nm thick layers is below 1.6nm. Our experimental results corroborate the calculated thickness for plastic relaxation of Ge on Si1−xGex. The effect of the surfactant on the growth of the virtual substrate and on the subsequent growth of Ge on Si0.21Ge0.79 is discussed.

We present an investigation of the electrical characteristics – recombination and contact resistance – of poly-crystalline (poly) Si/mono-crystalline (c) Si junctions and of the influence of the interfacial oxide between the poly-Si and the c-Si on these characteristics. In particular, we compare thermally grown oxides with different thickness values with wet chemically grown oxides. Both n- and p-type poly-Si emitters are investigated. For one combination (n-type poly-Si, thermal oxide), we compare planar and textured surfaces.

Strain relaxation of thin Ge layers grown by carbon-mediated epitaxy at 50 °C on Si(001) was investigated for a multi-step growth procedure. Additionally, the impact of the post-growth annealing temperature on the strain relaxation obtained for a single carbon-mediated growth step was analyzed. The degree of relaxation was monitored in situ by reflection high energy electron diffraction and ex situ by high-resolution x-ray diffraction and transmission electron microscopy. For multi-step growth, relaxation occurs mainly during the first cycle (growth and annealing). Full relaxation is already achieved after 3–4 cycles. The relaxation process during a single growth cycle can be divided into three sections: annealing up to 200 °C is sufficient to trigger most of the strain relaxation. After annealing up to 450 °C, the film lattice parameter already equals the Ge bulk value, though the layer shows a rough surface. Only an annealing step up to 650 °C results in a smooth surface and interface. Smooth and fully relaxed Ge films of only 26 nm thicknesses were obtained by carbon-mediated growth.

We report on the surfactant-mediated epitaxy (SME) of Si1-xGex films with x=0.23–1 on Si(001) using antimony as surfactant. We observe a transition in strain relaxation at a critical composition xT=0.58-0.66. Above this value full relaxation is achieved by a network of full edge dislocation confined to the interface in analogy to SME of pure germanium on Si(001). 100nm thick Si1−xGex films with surface roughness values less than 1nm and abrupt interfaces are obtained, as the surfactant reduces strain induced roughening and hinders interdiffusion.

Smooth, fully relaxed Ge layers (thickness below 100 nm) were grown directly on Si(001) in a cyclic process flow. Each cycle consists of a low temperature epitaxy step followed by the deposition of less than a monolayer of carbon and subsequent thermal annealing. Full strain relaxation was achieved for 65 nm thin Ge films. Carbon, which is not incorporated homogenously into the Ge layer, prevents the formation of islands during thermal annealing. The lattice mismatch is accommodated via a regular dislocation array of complete edge dislocations localized at the Si/Ge interface.

In this paper, the authors study the surfactant-mediated epitaxy (SME) of relaxed Ge films on (001)-orientated porous silicon wafers, which could be a first step towards a cost-efficient lift-off technique for lightweight high-efficiency multijunction Ge/III-V solar cells. Transmission electron microscopy (TEM) and high-resolution X-ray diffraction (XRD) investigations show full relaxation and high structural perfection of the epitaxial Ge. An abrupt interface showing no evidence for intermixing is formed between Ge and Si. Similar to SME of Ge on standard Si(001) wafers the lattice mismatch is compensated by a periodic array of full edge dislocations parallel to the interface. XRD measurements indicate that part of the silicon is under a small tensile strain. The authors attribute this to partial strain accommodation in the top silicon layer of the porous substrate which acts as a compliant substrate.

Crystalline thin films of Gd2O3 of varying thicknesses were grown on 2 inch p-Si(1 0 0) wafers by H2O-assisted atomic layer deposition (ALD) using a homoleptic gadolinium tris-guanidinate precursor [Gd(iPr-Me2N-Guan)3]. The Gd2O3 layers grown at 225 °C were polycrystalline with columnar growth morphology. The as-grown films were electrically characterized as a metal oxide semiconductor (MOS) capacitor and exhibited instability in the flat-band voltage. Upon subjection to post-deposition defect-passivation treatment, they exhibited promising electrical characteristics. More importantly, the vertical downscaling of Gd2O3 thin films through the H2O-assisted ALD process could be realized through the capacitance equivalent thickness versus physical thickness studies.

In this paper, we investigated the influence of changes in the initial micro-faceting induced by different Sb coverages on the structural properties of relaxed Ge films on Si(001). Two cases of surfactant-induced micro-faceted surfaces, exhibiting < 110 >- and < 100 >-oriented troughs for high and low Sb-coverage, respectively, were carefully prepared and 1 am thick Ge layers were grown. Transmission electron microscopy and x-ray diffraction were used to explore the effects that differently oriented surfactant-induced micro-facets exert on the structural film properties, in particular with regard to the Ge/Si interface.

We present an experimental study of the electron and hole charging and discharging processes in the direct tunneling regime of Ge nanocrystals (NCs) embedded in the SiO2 of metal/oxide/semiconductor transistors. A specific aim was to verify theoretical predictions of very long hole retention times for Ge NCs embedded in SiO2 with thin (direct) tunneling barriers which could be harnessed for fast nonvolatile memories. While we observed longer electron retention times than theoretically predicted, we did not find experimentally the expected long hole retention times. To explain the discrepancies between our results and the theoretical predictions, several nonideal properties of the real Ge–NC:SiO2/Si system were investigated. In particular, a Ge NC preparation-induced increase in the volume trap density in the tunnel oxide and an increase in the trap density at the interface between the tunnel oxide and the Si substrate were detected. However, this moderate increase in the trap densities by about one order of magnitude (as compared to reference samples without any Ge NCs) does not provide a plausible explanation for the short hole retention times observed. Rather, an electron current into the NCs during hole retention seems to limit the retention times. This effect should already occur in the ideal Ge–NC:SiO2/Si system, thus preventing the non-volatile memory applications of Ge NC based devices operating in the direct tunneling regime.

In this work, an unconventional approach for epitaxial growth of Si on single-crystalline rare-earth oxide is presented using molecular beam epitaxy under ultra-high vacuum. Surface and bulk crystalline structures as well as chemical content were examined. Silicon-on-insulator layers were fabricated by encapsulated solid phase epitaxy on Si(111) substrate. The gadolinium oxide capping layer was removed by wet-chemical etching. The remaining silicon layer is single crystalline without any impurities and exhibits 7 x 7 reconstructed surface after annealing in very low silicon flux in the growth chamber. The thermal stability of the fabricated silicon-on-insulator structure was studied by step-wise heating under ultra-high vacuum conditions. The fabricated ultra-thin (10-15 nm) silicon-on-oxide layers remain structurally and chemically stable up to 900 degrees C. (C) 2010 Elsevier Ltd. All rights reserved.

In this paper, we will demonstrate a novel approach to incorporate Si and/or Ge nanostructures into crystalline rare earth oxides using molecular beam epitaxy (MBE) for nanoelectronic devices application. By efficiently exploiting the growth kinetics during MBE we succeeded in creating semiconductor nanostructures exhibiting various dimensions, ranging from three dimensionally confined quantum dots (QDs) to the quantum wells, where the particles are confined in one dimension. The crystalline rare earth oxide that has been used in this study is the epitaxial gadolinium oxide (Gd2O3). The monolithic heterostructures comprised of Gd2O3-Ge/Si-Gd2O3 grown on Si substrate exhibit excellent crystalline quality with atomically sharp interface.

We investigate molecular beam epitaxial overgrowth of Si template layers produced by different approaches on single-crystalline oxide grown on Si(111). Three approaches based on modified solid-phase epitaxy were found to be suitable for the subsequent Si epitaxial overgrowth. The crystalline quality and interface properties of single-crystalline silicon on single-crystalline oxide grown on Si(111) make the obtained structures suitable for silicon-on-insulator applications. First measurements of electrical properties of p-type samples indicate good electrical properties of the top Si layer. Supplemental investigations demonstrate that Si layers with thickness in the range of 10nm remain stable during thermal annealing up to 900°C in an ultra-high vacuum.

In this work, we investigated the epitaxial growth of Gd2O3 thin films on germanium layers grown by surfactant-mediated epitaxy on silicon (001) substrates. The influence of the lattice mismatch between Ge and Gd2O3 as well as the impact of the lower surface energy of Ge compared to Si on the growth process have been studied resulting in conditions for epitaxy of smooth Gd2O3 films without any interfacial layer on Ge. We determined the epitaxial relationship and the crystalline structure of these films using transmission electron microscopy and X-ray diffraction. The Gd2O3 layers grow in two orthogonal (011)-oriented domains of the cubic phase. They are relaxed and show structural perfection similar to that of Gd2O3 films grown on Si(001). No interfacial layer is observed between the Gd2O3 and Ge making this material combination particularly suitable for an application in high-mobility channel MOSFETs with equivalent oxide thickness below 1nm.

Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 µm CMOS technology. We present results for crystalline gadolinium oxides on silicon in the cubic bixbyite structure grown by solid source molecular beam epitaxy. On Si(100), crystalline Gd2O3 grows usually as (110)-oriented domains, with two orthogonal in-plane orientations. Layers grown under best vacuum conditions often exhibit poor dielectric properties due to the formation of crystalline interfacial silicide inclusions. Additional oxygen supply during growth improves the dielectric properties significantly. Layers grown by an optimized MBE process display a sufficiently high-K value to achieve equivalent oxide thickness values ≪ 1 nm, combined with ultra-low leakage current densities, good reliability, and high electrical breakdown voltage. A variety of MOS capacitors and field effect transistors has been fabricated based on these layers. Efficient manipulation of Si(100) 4° miscut substrate surfaces can lead to single domain epitaxial Gd2O3 layer. Such epi-Gd2O3 layers exhibited significant lower leakage currents compared to the commonly obtained epitaxial layers with two orthogonal domains. For capacitance equivalent thicknesses below 1 nm, this differences disappear, indicating that for ultrathin layers direct tunneling becomes dominating.

We present a new ''templated self-organization'' method for the preparation of Ge nanocrystals in SiO"2 that combines a bottom-up with a top-down approach for nanostructuring. Ge nanocrystals are formed by self-organization induced by thermal annealing of thin Ge films embedded in SiO"2 whose areas are predefined by nanoimprint patterning. Thus much smaller structure sizes can be achieved than by pure nanostructuring and much more regular structures can be prepared than by pure self-organization. In particular, the method enables the generation of Ge nanocrystals of equal size at predefined vertical and lateral positions thus facilitating the fabrication of nanoscaled devices due to the suppression of structural fluctuations.

An efficient method based on molecular beam epitaxy has been developed to integrate an epitaxial Ge quantum well buried into a single crystalline rare earth oxide. The monolithic heterostructure comprised of Gd2O3-Ge-Gd2O3 grown on an Si substrate exhibits excellent crystalline quality with atomically sharp interfaces. This heterostructure with unique structural quality could be used for novel nanoelectronic applications in quantum-effect devices such as nanoscale transistors with a high mobility channel, resonant tunneling diode/transistors, etc. A phenomenological model has been proposed to explain the epitaxial growth process of the Ge layer under oxide encapsulation using a solid source molecular beam epitaxy technique.

We investigated the transformation of ultrathin continuous amorphous Ge layers embedded in SiO2 into isolated nanocrystals during thermal annealing. The dependence of the cluster self-organization processes on annealing time, annealing temperature, and initial layer thickness was studied quantitatively by extensive transmission electron microscopy analysis. The nanocrystal formation was found to run through distinct subsequent stages, from homogeneous crystal nucleation in the Ge layer to the outgrowth and ripening of isolated nanocrystals, within a few seconds for temperatures in the range of 1000 degrees C. The driving mechanisms of cluster formation were analyzed with a simple thermodynamic model of the Gibbs free energy. This indicates that the observed outgrowth of clusters from the initial layer into the SiO2 is essentially driven by the relaxation of the nanocluster interface energy due to structural adaption of the Ge, yielding an energetic benefit of the transformation of the continuous initial layer into isolated clusters as compared to a simple layer recrystallization. The observed bimodal nanocrystal size distributions are tentatively explained by an additional contribution to the free energy yielding a second barrier in cluster evolution, which can be deduced from the experiments. It is possibly related to inelastic strain effects in the nanocrystal formation. Ripening effects of the nanocrystals turned out to be not limited by diffusion.

Two new methods for fabrication of silicon-on-isolator (SOI) structures are studied. The first one is based on the formation of a template single crystalline Si-layer and combines encapsulated solid-vapor-phase epitaxy of silicon on rare-earth-metal-oxide layer, developed for fabrication of oxide/silicon/oxide heterostructures, subsequent chemical etching of the second oxide layer, followed by vapor-phase epitaxial growth of silicon on the template-silicon layer. In the second method, crystalline silicon islands serve as template for further growth of crystalline Si layer. Structural investigations show no interface and no noticeable differences in structure quality between these two silicon sub-layers grown on each other. Silicon-substrate/oxide/silicon heterostructure exhibits transition of the substrate crystalline structure with A/B/A twinning relationship. Initial stage of deposition of the template silicon is crucial for its structural quality. [DOI: 10.1380/ejssnt.2009.405]