We report on the results of experimental investigation and numerical simulation of switching of SOS diode with p + P 0 n + structure and with reduced thickness of P 0 -base. The proposed 1D diffusion-drift model of electron–hole plasma dynamics is found to be in good agreement with the experiment. The reduction of the P 0 -base thickness has allowed us to double the output pulse voltage with the same switching current density. This has been reached by a considerable reduction of switching losses as well as due to the formation of the domain of a strong quasi-rectangular electric field at the P 0 n + junction during the current interruption. As a result, output pulse amplitude considerably exceeds the static breakdown voltage of P 0 n + junction. This effect has been observed for the first time for high-voltage semiconductor opening switches.
The nanosecond semiconductor diode-based opening switch (SOS-diode) capable of switching currents with densities up to several tens of kiloamperes per cubic centimeter represents a p + p’Nn+ silicon structure fabricated by the deep simultaneous diffusion doping (to about 200 μm) of n-Si by Al and B from one side and P from the other. In the SOS mode, first a short pulse of forward current passes through the diode and then a fast-growing pulse of reverse voltage is applied. A resulting pulse of reverse current carries away injected holes and thereby forms a plasma front in the p’ layer, which moves toward the p’N junction. When the hole concentration in the flow exceeds the dopant concentration in the p’ layer, a space charge region arises in this layer, the resistivity of the diode increases sharply, and the current switches to a load connected parallel to the diode. Early results concerning an alternative configuration of the SOS diode are presented. Here, the diode was made by the rapid simultaneous diffusion of B and P from the opposite sides of a p-Si wafer to a depth of 60-80 μm. If a short pulse of forward current is passed through such a p + pn + structure and a pulse of reverse voltage is then applied, a plasma front arising in the p + region moves toward the p + p interface through the heavily doped (i.e., low-resistivity) p + region. Having crossed this interface, the front passes into a low-doped region, where the hole concentration in the flow becomes much higher than the dopant concentration and a space charge region causing the current to pass to the load forms at once. It is shown experimentally that, all other things being the same, the time of current breaking in the p-SOS-diode is roughly twice as short as in the conventional n-SOS-diode, switched currents are considerably lower, and the fabrication technique of p-SOS-diodes is much simpler. Ways of optimizing the design of the semiconductor structure of the p-SOS-diode to further raise the speed are outlined.
A study of the formation of shallow hydrogen-containing donors (hydrogen-related shallow thermal donors, STD(H)) in silicon under proton irradiation followed by annealing in a temperature range of 300–500°C is reported. The effect of postimplantation annealing regimes on the concentration distribution of shallow donors at various proton energies and fluences is examined. It is shown that the shape of the concentration profiles strongly varies with temperature and annealing duration when a fixed concentration of radiation defects is introduced and equally with energy and dose at a given annealing temperature. It is also shown that the process in which hydrogen-containing shallow donors are formed is accompanied by the appearance in n -type silicon of H-induced buried n ′-layers, the formation of which near the pn junction in the high-resistivity n -base of diode structures allows the breakdown voltage of high-voltage pn junctions to be controlled. In the general case, this makes it possible to improve the characteristics of power silicon devices of various purposes.
We have studied the process of reverse recovery of Si/Si1 − x Ge x heterodiodes fabricated by direct bonding of (111)-oriented n-type single crystal silicon wafers with p-type Si1 − x Ge x wafers of the same orientation containing 4–8 at. % Ge. An increase in the germanium concentration N Ge in p-Si1 − x Ge x layer is accompanied by a decrease in the reverse recovery time of heterodiodes. The presence of a sharp drop in the reverse current on the diode recovery characteristic can be explained by the existence of a narrow region with decreased minority carrier lifetime at the bonding interface (compared to carrier lifetime in the bulk), which is caused by the accumulation of misfit dislocations (generated by bonding (in this region). The results demonstrate the principal possibility of creating fast-recovery diodes based on the Si/Si1 − x Ge x heterosystem for high-power semiconductor devices manufactured using the direct bonding technology.
A new method for fabricating SiGe-on-insulator substrates, i.e., direct bonding of thermally oxidized Si wafers with Si1 − x Ge x wafers cut from Czochralski-grown crystals, is suggested. Si1 − x Ge x layers no larger than 10 μm thick in SiGe/SiO2/Si compositions were fabricated by chemical mechanical polishing. To increase the Ge content in the Si1 − x Ge x layer, thermal oxidation was used. It was shown that the increase in the Ge content and heat treatment procedures at 1250°C are not accompanied by degradation of structural and electrical characteristics of Si1 − x Ge x layers.
Crack-free Interfaces can be achieved in wafer-bonded Ge/Si by using Patterned grooves Using synchrotron radiation phase-contrast Imaging and scanning electron microscopy, we observed cracking that is Induced by thermal stresses in thin (h(Ge) <= 0 5h(Si)) Ge wafers on smooth Si substrates Theoretical calculation shows it remarkable reduction in thermal stresses in Ge wafer bonded to grooved Si substrate We demonstrate the fabrication of crack-free Ge/Si (h(Ge) = 0 5h(Si)) structure by patterned grooves, its confirmed by in ohmic I-V characteristic across the heterojunction (C) 2009 Acta Materialia Inc Published by Elsevier Ltd All rights reserved
We have studied the current-voltage (I–U) characteristics of Si/Si1 − x Ge x (0.02 < x < 0.15) heterodiodes fabricated by direct bonding of (111)-oriented n-type single crystal silicon wafers with p-type Si1 − x Ge x wafers of the same orientation containing 2–15 at % Ge. An increase in the germanium concentration N Ge in Si1 − x Ge x crystals is accompanied by a growth in the density of crystal lattice defects, which leads to a decrease in the minority carrier lifetime in the base of the heterodiode and an increase in the recombination component of the forward current and in the differential resistance (slope) of the I–U curve. However, for all samples with N Ge ≤ 15 at %, the I–U curves of Si/Si1 − x Ge x heterodiodes are satisfactory in the entire range of current densities (1 mA/cm2–200 A/cm2). This result shows good prospects for using direct bonding technology in the fabrication of Si/Si1 − x Ge x heterostructures.
The defect structure of Si1–x Gex wafers with 4% of germanium and their interfaces with Si wafers were studied using white radiation topography and phase‐sensitive radiography. The heterostructures were manufactured by direct bonding of Si1–x Gex and Si crystalline wafers made of bulk crystals that were grown by the Czochralski technique. In Si1–x Gex crystals, the segregations of Ge act as dislocation nucleation sites. In Si1–x Gex /Si bonded structures, the segregation of Ge as well as the accumulation of dislocations induce elastic strain and plastic deformation during high‐temperature bonding annealing. With the topography–radiography combination, we are able not only to detect microcracks, indicating nonbonded areas, by radiography, but also to reveal dislocations and long‐range strain fields by topography at the same time. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
Results obtained in a study of current-voltage characteristics of isotype SiC-SiC structures fabricated by direct bonding of single-crystal n -type 6 H -SiC wafers with a donor concentration of ∼10 16 cm −3 are presented. The initial wafer bonding was done in deionized water. To enhance the adhesion, the structure was thermally annealed at 1250°C. All the features of the current-voltage characteristics measured are consistently explained in terms of the hypothesis that the SiC-SiC interface is a variable-thickness channel filled with a native SiO x oxide of thickness 10–100 nm. The minimum experimentally measured differential resistance of the structure (6 Θ cm 2 ) is limited by the current transport in the oxide layer, which occurs by the mechanism of space-charge-limited currents.
The results of studying the structural and electrical properties of structures produced by the method of direct bonding of Ge x Si 1− x and Si wafers are reported. The wafers were cut from the crystals grown by the Czochralski method. Continuity of the interface and the crystal-lattice defects were studied by X-ray methods using synchrotron radiation and by scanning electron microscopy. Measurements of the forward and reverse current-voltage characteristics of the p -Ge x Si 1− x / n -Si diodes made it possible to assess the effect of the crystallattice defects on the electrical properties of heterojunctions. Satisfactory electrical parameters suggest that the technology of direct bonding is promising for the fabrication of large-area Ge x Si 1− x /Si heterojunctions.
The direct bonding of two oxide-free 6H-SiC(0001) silicon carbide single crystal wafers, one smooth and another bearing an artificial microscopic relief, has been studied. According to the X-ray topography data, the bonded surface fraction reaches 85% of the total area. The pattern of stress distribution at the interface is aperiodic, which is indicative of an inhomogeneous microroughness of the surface of bonded wafers.
An original technique for Si-Si direct bonding combined with impurity diffusion in a single process is suggested. A dopant (aluminum) source is located at the interface. The high-temperature treatment of the polished wafers in an oxidizing atmosphere results in the diffusion of Al atoms and the formation of a p-n junction in n-silicon. The presence of aluminum is shown to improve the continuity of the interface. Results obtained are explained within a model whereby the initial contact between the hydrophilic silicon surfaces in a water solution of aluminum nitrate Al(NO3)3 serves to increase the bonding area of the wafers at room temperature due to the interaction of Al-OH groups with water molecules adsorbed on the surfaces of the wafers.
A mechanism of changes in the regular mesoscopic relief, which has been intentionally formed on one of two silicon substrate under direct wafer bonding at 1200 degreesC, is discussed. An introduction of aqueous solutions of impurities (Al or Ga or B or P) at the interface of the silicon wafers bonded resulted in smoothening the relief after bonding. Under optimum temporal and thermal conditions of the treatment as well as on applying the Al or Ga aqueous solutions, the relief disappeared. The results obtained allowed the conclusions that the diffusion creep could take part in the groove smoothening effect and the mass transport was not limited by only mechanism.
A method for determining the energy spectrum of charges and surface-state densities at the interfaces of semiconductor-insulator-semiconductor structures was developed; the method is based on the analysis of capacitance-voltage characteristics. The method was experimentally tested with Si-SiO2-Si structures prepared by direct bonding of both mirror-polished smooth wafers and wafers with a regular mesoscopic relief pattern at the inner surface of the wafers to be bonded. The density of surface states is lower at the surfaces with a regular relief pattern than that at the surfaces without the surface relief.
An investigation was made to determine how a regular relief on the silicon surface influences gettering in silicon-silicon-dioxide structures. The regular relief was created by a photolithographic technique before oxidation and comprised an orthogonal network of overlapping bands. The gettering was determined from the isothermal relaxation of the capacitance of a silicon-silicon-dioxide structure after switching from strong inversion to even stronger inversion. It is shown that a regular relief at the silicon-silicon-dioxide interface is an effective getter at a depth of several hundred micron.