The experimental observation of the actual thermo-mechanical weak points in microelectronics packages remains a big challenge. Recently, a stress sensing system has been developed by the publicly funded project that allows measuring the magnitudes and the distribution of the stresses induced in the silicon dies by thermo-mechanical loads. The paper reports investigations on industrial QFN packages of 6×6×1mm 3 in size. The stress field has been recorded before and after soldering the component to the PCB as well as during thermal cycle and bending tests. Onset and evolution of internal damages have been detected by changes in the stress at the chip surface due to degradations of materials or interfaces within the course of the thermal cycling test. Applying 3-D x-ray computer tomography, the damages inside the packages have been validated at several stages during the test. All measurements are supplemented by finite element simulations based on calibrated models for in-depth analysis and for extrapolating the stress results to sites of the package that are not measured directly. The methodology of closely combining stress measurements and FE simulation presented in this paper has been able to validate the stress sensing system for tasks of comprehensive design and process characterization as well as for health monitoring. It allows achieving both, a substantial reduction in time-to-market and a high level of reliability under service conditions, as needed for future electronics and smart systems packages.

The spectacular perceptions into the volume of structural parts which can be achieved by computer tomography (CT) readily give the impression that materialographic microsection examinations can be omitted. The display of the volume, which is three-dimensional, permits to detect pores and their distribution or measure inner structures in a non-destructive way at an accuracy which has been unknown up to date. A failure analysis makes it possible to locate and assess damage or defects without interfering with the material composite. The CT also enables to non-destructively investigate structural parts which contain liquid, rubber-like or hazardous substances and, hence, are accessible to a microsection analysis only under certain conditions.

Long and narrow beams of single crystal silicon were made by surrounding them with trenches of different width followed by dry release etch. The beams were coated nonconformally during fabrication. Depending on the asymmetry of the films coated onto the beam sidewalls they tend to bend laterally. This deflection has been analyzed experimentally and by FEM-Simulations.

Due to their robustness and precision, micro- and nanoelectomechanical systems (MEMS/NEMS) are frequently used for all kind of technological applications. Therefore there is a high demand regarding reliability of these components. Exact knowledge of the deformation behavior of materials, material compounds, components and constructions are the backbone of the reliability evaluation and lifetime prediction under mechanical and thermal loading. Those parameters are usually maintained by means of geometric changes at the surface, independent of the measurement method. The high-resolution computer tomography enables the non-destructive acquisition of loading-dependent variations in the 3D-volume of objects, which can be evaluated quantitative and qualitative by using new developed software.

The development cycle of new products can be dramatically reduced if exact lifetime models are at hand. This requires the precise knowledge of the failure modes and the failure position under all test and service conditions. In case of dynamic mechanical loads like drops of BGA modules, broken copper traces at the PCB side are more and more often observed to be the ultimate failure effect. However, straightforward FEM simulations have shown unrealistic high stress and strain results not matching experimental observations which prove that a realistic representation of this failure is not trivial.

This paper derives and evaluates an effective thermal material simulation model in simula-tion and experiment as well as proposes a non-destructive failure analysis for multi-layer sub-strates with thermal or electrical vias to derive exact failure data to supplement existing life-time models.

IR-thermography has become increasingly important for non-destructive testing of microelectronic devices and structures on chip, package and board-level. This paper focuses on the evaluation of best applicability for different pulse excitation modes to detect flaws and damages as well as to determine material properties. Pulse IR thermography using electrical and laser excitation was chosen as an analytic method to observe and quantify crack growths in vias under thermal cycling load. We found that cracks are detectable unambiguously and its advantage over the ohmic test. The laser excitation in contrast to the electrical excitation has a good potential for large-scale screening as the board can be stepwise thermally excited and screened in one go without having any additional measuring lines. A new concept detecting crack tips was demonstrated.

A study of the performance of different Sn based solder alloys applied for large to small sized solder interconnects was undertaken. From the theoretical and experimental investigations on creep, fatigue and brittle fracture behaviors the paper focuses on the low cycle fatigue performance in test and field thermal environments. Special focus was put on a newly developed highly creep resistant solder alloy "Innolot" (SnAg3.8Cu0.7Bi3.0Sbl.4Ni0.2). In addition to results of previous studies on lead free materials, particularly their long- term durability and their microstructure-properties dependence was addressed. Phenomenological models based on finite element analyses including solder creep behaviors were applied to study the component and cyclic regime dependent creep straining and creep dissipation in several joints to assess solder failure. For this purpose, creep properties of several solders were measured for ball-type joint sized specimens.

AuSn is a special purpose interconnect material with advantages concerning its high temperature resistance, used for fluxless soldering for optoelectronic and RF devices as well as in fine pitch flip chip technology. Finite element (FE) analyses were conducted on assemblies with AuSn interconnects. Stress analyses require data on the materials stress-strain behavior, however, in case of AuSn solder joints material characteristics are not easily available. In the paper investigations on material characterization concerning the elastic and plastic behaviour as well as the fatigue properties of electroplated Au and AuSn are reported. It is shown that properties of these materials depend strongly on their composition and their microstructure, the latter being fundamentally affected by processing. By application of thermal lap shear tests the low cycle fatigue behavior of AuSn joints is studied. The results show that inter-phase cracking is the dominant fatigue failure mechanism, which is only indirectly linked to plastic straining calculated under homogeneity assumption. Computational analyses concerning the reliability of AuSn flip chip joints for GaAs pixel detectors are finally reported in the paper.

Many solder creep and fatigue models have been developed to predict the fatigue life of solder joints under low-cycle fatigue conditions. However, because of the diversity of leadfree solders, additional work has been performed to find out effects of alloying content, surface finish, thermal cycle conditions and microstructure. Based on creep properties, the solder joint creep strain and creep dissipation responses for ceramic chip components were analyzed by FEA. Different thermal cycling conditions were considered. It was observed that with lowered Ag content the maximum creep strain amplitudes increase, but a drop in maximum cyclic stress occurs. On the contrary, a special SAC alloy was tested with five alloying elements, called Innolot (SnAg3.8Cu0.7Bi3.0Sbl.4Ni0.2). It shows a high stress amplitude during cycling, i.e. a high creep resistance, and the creep strain becomes very low. Fatigue behavior of the different alloys is discussed.

In Microelectronic and MEMS (Micro-Electro-Mechanical Systems) applications the volume of solder joints decreases rapidly due to higher packaging density. In recent years, many solder alloys have been developed and used. Many of lead-free-solders show a complex material behaviour due to different mechanical and thermal properties throughout the sandwich which can influence the mechanical and thermal reliability as well as the life time. For this reason, ensuring the solder joint reliability is one of the most critical design aspects of electronic assemblies. To predict the failure of solder joints with the help of the FE-Simulations tools, the description of solder behaviour is needed. The mechanical behaviour of solder is non-linear and temperature dependent. Solder alloy in consideration are above 0.5 of their melting point at − 40°C, so creep processes are expected [1,2]. The failure behaviour of solder is a complex sequence and depends on microstructures, like grain coarsening, micro-voiding, recrystallization, micro-cracking and macro-cracking on alloying content, soldering temperature profile and dissolution of metallizations. Changes of the microstructure can significantly effect the mechanical properties of the solders. Inhomogeneity of solders, espacially of Sn-based lead free solders, can cause local fatigue driven multiple cracking (3,4). Furthermore, plate-like intermetallic compounds (IMC) may cause crack initiation and brittle fracture at interface to metallization, especially if the joint thickness becomes comperable to the IMC-thickness respectively (Figure 1).

The knowledge of deformation and fatigue behaviour is vital for understanding reliability problems and builds the basis for mechanical simulations, which quantify strains, stresses and even product life-times. The focus of this paper is the AuSn interconnect in the form of eutectic AuSn and fine pitch flip-chip interconnects consisting in this example of an Au-phase and a zetha-phase. In the fist place local elastic-plastic properties are analysed by nanoindentation giving information about the process influences on material properties. To analyse the fracture, damage and fatigue behaviour of eutectic AuSn interconnects, special set-ups have been developed. Normal lap shear samples enable the analysis under pure mechanical load and thermal lap shear specimen enable the analysis under combined thermal and mechanical load. Thus different failure modes are outlined, which can be the focus for further quantitative analysis

A combined numerical-testing methodology for the evaluation of thermo-mechanical fatigue of small volumes of shear-loaded electronic materials has been developed. Small lap-shear specimens with slightly different thermal expansion are mounted in a loading frame, suffering shear loading of the joint material when subjected to thermal loads. In-situ deformation analysis of the joint surface is an integral part of the procedure. This way the progress of microstructural changes caused by thermal fatigue can be visualized at the surface of the joint at different cyclic states. Fatigue of Sn/sub 95.5/Ag/sub 3.8/Cu/sub 0.7/ solder joints was investigated with this "thermal lap shear test". Different cyclic environments were addressed: Test cycles -40 /spl deg/C to 125 /spl deg/C and field cycles 0 /spl deg/C to 80 /spl deg/C. During thermal cycling in a microscope temperature chamber, the changes of the microstructure were monitored. When playing these micrographs taken at different temperatures as a video sequence, it becomes obvious that sliding between boundaries of the Sn-rich phases is the dominant deformation mechanism leading to crack propagation at multiple fronts along these "grain boundaries". No principle difference was observed for the field cycle and the test cycle, despite the different maximum stress ranges occuring during the different cycles. It has been shown that the final macroscopic crack starts in the region of highest equivalent creep strain and follows the path along its local maximum, corresponding to the finite element analyses (FEA) results. Fatigue progress is achieved by either conventional thermal shock cycling, during which the electrical resistance changes are recorded, or slow field cycling without electrical measurements. Microstructural degradation progress, electrical resistance changes of the joints and FEA based failure prediction were finally compared for the test cycle.

A combined numerical-testing methodology has been developed for the evaluation of thermo-mechanical fatigue of small volumes of electronic materials loaded in shear. Small lap-shear specimens are mounted in a loading frame with slightly different thermal expansion, causing shear loading of the joint material when subjected to thermal loads. In-situ deformation analysis of the joint surface is an integral part of the procedure. Fatigue of Sn95.5Ag3.8Cu0.7 solder joints was investigated with this "Thermal Lap Shear Test". During thermal cycling in a microscope temperature chamber the changes of the microstructure were monitored. When playing these micrographs taken at different temperatures as a video sequence it becomes obvious that sliding between boundaries of the Sn-rich phases is the dominant deformation mechanism, which leads to crack propagation at multiple fronts along these "grain boundaries". However, it is shown that the final macroscopic crack starts in the region of highest equivalent creep strain and follows the path along its local maximum, corresponding to the finite element analyses (FEA) results. Fatigue progress is achieved by conventional thermal shock cycling, during which the electrical resistance changes are recorded. Microstructural degradation progress, electrical resistance changes of the joints and FEA based failure prediction are finally compared.

In recent years, solder joints have been continuously incorporated in electronics packages and MEMS-technology, too. The strong trend towards high-temperature applications can be observed in combination with the tendency to increasingly use of lead-free solders. Low deformation and stress distributions between the different interconnect components coupled with long-term reliability becomes a hot issue. A key factor of solder joint failure is the mismatch in the thermal expansion coefficient between the different individual components in various applications among them automotive, telecommunication or wide range of MEMS. Fatigue tests are directed in two main directions (i) thermal induced low cycle fatigue /1-4/ and (ii) mechanical loading such as vibrations and shocks /5/ as well. The combination of Finite-Element-Analysis (FEA) and advanced experimental testing methods are a suitable way to describe time and temperature dependent strength, fatigue and interface behaviour including the formulation of material laws of solders and adhesives, too. Measured deformation fields and material parameters are essential assumptions to predict the reliability and to predict the lifetime of multi-material structures and MEMS packaging.

The paper presents a novel kind of Hadamard transform optic. First investigations are made with a micro mirror array in a Hadamard transform spectrometer (HTS) whereby the usually used detector array is replaced by the micro mirror array. All the mirrors are imaged onto a single detector. The measurement is performed using a Hadamard matrix, i.e. while each detector reading a certain combination of mirrors given by the matrix is reflecting the light towards the detector. All the rest of them are reflecting the light beside it. The consequence is an improvement of the signal to noise ratio (SNR). The novelty of the realized spectrometer is that in contrast to other applications [1], [2], [3], [4], [5] the mirrors are not statically switched but they are forced to oscillate at their resonant frequency. By this way a special Hadamard matrix can be used that improves the SNR best.